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| author | Xiang, Haihao <haihao.xiang@intel.com> | 2007-01-17 10:39:50 +0800 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2007-01-17 10:39:50 +0800 |
| commit | 747c9129c0b592941b14c290ff3d8ab22ad66acb (patch) | |
| tree | bbf80c50c3ddf49e3c345956556aeccc341412cc /src/mesa/drivers/dri/i965/brw_gs.c | |
| parent | afba8f0d30974bf7fbb9533f23eb2f92d49ac526 (diff) | |
| download | external_mesa3d-747c9129c0b592941b14c290ff3d8ab22ad66acb.zip external_mesa3d-747c9129c0b592941b14c290ff3d8ab22ad66acb.tar.gz external_mesa3d-747c9129c0b592941b14c290ff3d8ab22ad66acb.tar.bz2 | |
I965: fix bug#9625-get the correct PV for quardstrip
The order of vertices in payload for quardstrip is (0, 1, 3, 2),
so the PV for quardstrip is c->reg.vertex[2].
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_gs.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_gs.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c index 9066e42..73263a5 100644 --- a/src/mesa/drivers/dri/i965/brw_gs.c +++ b/src/mesa/drivers/dri/i965/brw_gs.c @@ -82,6 +82,9 @@ static void compile_gs_prog( struct brw_context *brw, case GL_QUADS: brw_gs_quads( &c ); break; + case GL_QUAD_STRIP: + brw_gs_quad_strip( &c ); + break; case GL_LINE_LOOP: brw_gs_lines( &c ); break; @@ -145,7 +148,7 @@ static const GLenum gs_prim[GL_POLYGON+1] = { GL_TRIANGLES, GL_TRIANGLES, GL_QUADS, - GL_QUADS, + GL_QUAD_STRIP, GL_TRIANGLES }; |