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| author | Ian Romanick <ian.d.romanick@intel.com> | 2014-01-10 13:43:24 -0800 |
|---|---|---|
| committer | Ian Romanick <ian.d.romanick@intel.com> | 2014-01-20 11:32:01 -0800 |
| commit | 37f65b07512c0291580811689f65bfcbcc489231 (patch) | |
| tree | de3d1fc1f2b94733eb0d63fd524e0a3fe732cc19 /src/mesa/drivers/dri/i965/brw_gs_state.c | |
| parent | 9ef16befd0068544287c5f327a77fe8af6aee329 (diff) | |
| download | external_mesa3d-37f65b07512c0291580811689f65bfcbcc489231.zip external_mesa3d-37f65b07512c0291580811689f65bfcbcc489231.tar.gz external_mesa3d-37f65b07512c0291580811689f65bfcbcc489231.tar.bz2 | |
i965: Set the maximum VPIndex
At various stages the hardware clamps the gl_ViewportIndex to these
values. Setting them to zero effectively makes gl_ViewportIndex be
ignored. This is acutally useful in blorp (so that we don't have to
modify all of the viewport / scissor state).
v2: Use INTEL_MASK to create GEN6_CLIP_MAX_VP_INDEX_MASK. Suggested by
Ken.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_gs_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_gs_state.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_gs_state.c b/src/mesa/drivers/dri/i965/brw_gs_state.c index 9532614..d0c92fa 100644 --- a/src/mesa/drivers/dri/i965/brw_gs_state.c +++ b/src/mesa/drivers/dri/i965/brw_gs_state.c @@ -83,6 +83,8 @@ brw_upload_gs_unit(struct brw_context *brw) if (unlikely(INTEL_DEBUG & DEBUG_STATS)) gs->thread4.stats_enable = 1; + gs->gs6.max_vp_index = brw->ctx.Const.MaxViewports - 1; + brw->state.dirty.cache |= CACHE_NEW_FF_GS_UNIT; } |