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| author | Ben Widawsky <benjamin.widawsky@intel.com> | 2015-06-04 23:59:23 -0700 |
|---|---|---|
| committer | Ben Widawsky <benjamin.widawsky@intel.com> | 2015-06-05 14:25:47 -0700 |
| commit | b639ed2f1b170d1184c6d94c88c826c51ffc8726 (patch) | |
| tree | 29885b25dde62294ba97d2a5528b3d926bbee03d /src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | |
| parent | 77a44512d9ed56be5e53ebf09e917b5aeeba0189 (diff) | |
| download | external_mesa3d-b639ed2f1b170d1184c6d94c88c826c51ffc8726.zip external_mesa3d-b639ed2f1b170d1184c6d94c88c826c51ffc8726.tar.gz external_mesa3d-b639ed2f1b170d1184c6d94c88c826c51ffc8726.tar.bz2 | |
i965: Add gen8 fast clear perf debug
In an ideal world I would just implement this instead of adding the perf debug.
There are some errata involved which lead me to believe it won't be so simple as
flipping a few bits.
There is room to add a thing for Gen9s flexibility, but since I am actively
working on that I have opted to ignore it.
Example:
Multi-LOD fast clear - giving up (256x128x8).
v2: Use braces for if statements because they are multiple lines (Ken)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_meta_fast_clear.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c index a864143..c0c8dfa 100644 --- a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c +++ b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c @@ -340,6 +340,10 @@ is_color_fast_clear_compatible(struct brw_context *brw, const union gl_color_union *color) { if (_mesa_is_format_integer_color(format)) + if (brw->gen >= 8) { + perf_debug("Integer fast clear not enabled for (%s)", + _mesa_get_format_name(format)); + } return false; for (int i = 0; i < 4; i++) { |