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author | Kenneth Graunke <kenneth@whitecape.org> | 2012-08-24 18:40:40 -0700 |
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committer | Kenneth Graunke <kenneth@whitecape.org> | 2012-09-06 16:39:48 -0700 |
commit | 815d9d405c69bb07d550ae9f79283dcdc7466e2c (patch) | |
tree | cdb548669e17907c613ad5e66cf86805851eaed4 /src/mesa/drivers/dri/i965/brw_primitive_restart.c | |
parent | 058fb0071639d076a850dd29120a232fe7fdbce6 (diff) | |
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i965: Fix primitive restart on Haswell.
Haswell moved the "Cut Index Enable" bit from the INDEX_BUFFER packet to
a new 3DSTATE_VF packet, so we need to emit that. Also, it requires us
to specify the cut index rather than assuming it's 0xffffffff.
This adds a new Haswell-specific tracked state atom to gen7_atoms.
Normally, we would create a new generation-specific atom list, but since
there's only one difference over Ivybridge so far, I chose to simply
make it return without doing any work on non-Haswell systems.
Fixes five piglit tests:
- general/primitive-restart-DISABLE_VBO
- general/primitive-restart-VBO_COMBINED_VERTEX_AND_INDEX
- general/primitive-restart-VBO_INDEX_ONLY
- general/primitive-restart-VBO_SEPARATE_VERTEX_AND_INDEX
- general/primitive-restart-VBO_VERTEX_ONLY
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_primitive_restart.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_primitive_restart.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_primitive_restart.c b/src/mesa/drivers/dri/i965/brw_primitive_restart.c index 02deba4..38b5243 100644 --- a/src/mesa/drivers/dri/i965/brw_primitive_restart.c +++ b/src/mesa/drivers/dri/i965/brw_primitive_restart.c @@ -29,8 +29,11 @@ #include "main/bufferobj.h" #include "brw_context.h" +#include "brw_defines.h" #include "brw_draw.h" +#include "intel_batchbuffer.h" + /** * Check if the hardware's cut index support can handle the primitive * restart index value. @@ -39,6 +42,12 @@ static bool can_cut_index_handle_restart_index(struct gl_context *ctx, const struct _mesa_index_buffer *ib) { + struct intel_context *intel = intel_context(ctx); + + /* Haswell supports an arbitrary cut index. */ + if (intel->is_haswell) + return true; + bool cut_index_will_work; switch (ib->type) { @@ -176,3 +185,30 @@ brw_handle_primitive_restart(struct gl_context *ctx, return GL_TRUE; } +static void +haswell_upload_cut_index(struct brw_context *brw) +{ + struct intel_context *intel = &brw->intel; + struct gl_context *ctx = &intel->ctx; + + /* Don't trigger on Ivybridge */ + if (!intel->is_haswell) + return; + + const unsigned cut_index_setting = + ctx->Array.PrimitiveRestart ? HSW_CUT_INDEX_ENABLE : 0; + + BEGIN_BATCH(2); + OUT_BATCH(_3DSTATE_VF << 16 | cut_index_setting | (2 - 2)); + OUT_BATCH(ctx->Array.RestartIndex); + ADVANCE_BATCH(); +} + +const struct brw_tracked_state haswell_cut_index = { + .dirty = { + .mesa = _NEW_TRANSFORM, + .brw = 0, + .cache = 0, + }, + .emit = haswell_upload_cut_index, +}; |