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authorMatt Turner <mattst88@gmail.com>2014-06-10 17:44:56 -0700
committerMatt Turner <mattst88@gmail.com>2014-06-11 20:57:10 -0700
commit2c8520c03de135228c37d67c9ff9756e3febb660 (patch)
treec306ca38cdd86fa8e126128cceda40a56bc156ab /src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
parentf51a7e00da25e25bd84e0f49df0a7423dbfd4acf (diff)
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i965: Use brw->gen in some generation checks.
Will simplify the automated conversion if we want to allow compiling the driver for a single generation. Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp')
-rw-r--r--src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp11
1 files changed, 6 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index 34b036f..14f9579 100644
--- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
@@ -882,7 +882,7 @@ fs_instruction_scheduler::calculate_deps()
last_conditional_mod[inst->flag_subreg] = n;
}
- if (inst->writes_accumulator_implicitly(v->brw->gen) &&
+ if (inst->writes_accumulator_implicitly(v->brw) &&
!inst->dst.is_accumulator()) {
add_dep(last_accumulator_write, n);
last_accumulator_write = n;
@@ -1002,7 +1002,7 @@ fs_instruction_scheduler::calculate_deps()
last_conditional_mod[inst->flag_subreg] = n;
}
- if (inst->writes_accumulator_implicitly(v->brw->gen)) {
+ if (inst->writes_accumulator_implicitly(v->brw)) {
last_accumulator_write = n;
}
}
@@ -1112,7 +1112,7 @@ vec4_instruction_scheduler::calculate_deps()
last_conditional_mod = n;
}
- if (inst->writes_accumulator_implicitly(v->brw->gen) &&
+ if (inst->writes_accumulator_implicitly(v->brw) &&
!inst->dst.is_accumulator()) {
add_dep(last_accumulator_write, n);
last_accumulator_write = n;
@@ -1197,7 +1197,7 @@ vec4_instruction_scheduler::calculate_deps()
last_conditional_mod = n;
}
- if (inst->writes_accumulator_implicitly(v->brw->gen)) {
+ if (inst->writes_accumulator_implicitly(v->brw)) {
last_accumulator_write = n;
}
}
@@ -1206,6 +1206,7 @@ vec4_instruction_scheduler::calculate_deps()
schedule_node *
fs_instruction_scheduler::choose_instruction_to_schedule()
{
+ struct brw_context *brw = v->brw;
schedule_node *chosen = NULL;
if (mode == SCHEDULE_PRE || mode == SCHEDULE_POST) {
@@ -1276,7 +1277,7 @@ fs_instruction_scheduler::choose_instruction_to_schedule()
* then the MRFs for the next SEND, then the next SEND, then the
* MRFs, etc., without ever consuming the results of a send.
*/
- if (v->brw->gen < 7) {
+ if (brw->gen < 7) {
fs_inst *chosen_inst = (fs_inst *)chosen->inst;
/* We use regs_written > 1 as our test for the kind of send