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| author | Francisco Jerez <currojerez@riseup.net> | 2013-10-20 14:02:08 -0700 |
|---|---|---|
| committer | Francisco Jerez <currojerez@riseup.net> | 2013-11-04 12:12:37 -0800 |
| commit | 34fe051e215107dddbaae71e2edf15f88d839936 (patch) | |
| tree | 434dc2ff99387dcf328854cc76e1aa7270be0929 /src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | |
| parent | bf045bf9b409c47019fa7d9c859eaf8d50dd7032 (diff) | |
| download | external_mesa3d-34fe051e215107dddbaae71e2edf15f88d839936.zip external_mesa3d-34fe051e215107dddbaae71e2edf15f88d839936.tar.gz external_mesa3d-34fe051e215107dddbaae71e2edf15f88d839936.tar.bz2 | |
i965: Add a 'has_side_effects' back-end instruction predicate.
This patch fixes the three dead code elimination passes and the
VEC4/FS instruction scheduling passes so they leave instructions with
side effects alone.
At some point it might be interesting to have the instruction
scheduler calculate the exact memory dependencies between atomic ops,
but they're rare enough that it seems unlikely that it will make any
practical difference.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp index 5dcd0e8..fe0de08 100644 --- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp +++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp @@ -603,7 +603,8 @@ fs_instruction_scheduler::calculate_deps() schedule_node *n = (schedule_node *)node; fs_inst *inst = (fs_inst *)n->inst; - if (inst->opcode == FS_OPCODE_PLACEHOLDER_HALT) + if (inst->opcode == FS_OPCODE_PLACEHOLDER_HALT || + inst->has_side_effects()) add_barrier_deps(n); /* read-after-write deps. */ @@ -832,6 +833,9 @@ vec4_instruction_scheduler::calculate_deps() schedule_node *n = (schedule_node *)node; vec4_instruction *inst = (vec4_instruction *)n->inst; + if (inst->has_side_effects()) + add_barrier_deps(n); + /* read-after-write deps. */ for (int i = 0; i < 3; i++) { if (inst->src[i].file == GRF) { |