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| author | Matt Turner <mattst88@gmail.com> | 2016-02-14 23:23:53 -0800 |
|---|---|---|
| committer | Matt Turner <mattst88@gmail.com> | 2016-03-30 19:54:29 -0700 |
| commit | 65bc94022b0fd31d01c8de65f7f1115a86baa65a (patch) | |
| tree | c710e5fcb9bc67ff415b97ced5d31fddb726830b /src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | |
| parent | 10b189f985755496a179b663d4b0746f3717093b (diff) | |
| download | external_mesa3d-65bc94022b0fd31d01c8de65f7f1115a86baa65a.zip external_mesa3d-65bc94022b0fd31d01c8de65f7f1115a86baa65a.tar.gz external_mesa3d-65bc94022b0fd31d01c8de65f7f1115a86baa65a.tar.bz2 | |
i965: Remove incorrect cycle estimates.
These printed the cycle count the last basic block (sched.time is set
per basic block!). We have accurate, full program, data printed
elsewhere.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp index 5b54b51..51d9ce1 100644 --- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp +++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp @@ -1674,11 +1674,6 @@ fs_visitor::schedule_instructions(instruction_scheduler_mode mode) cfg->num_blocks, mode); sched.run(cfg); - if (unlikely(debug_enabled) && mode == SCHEDULE_POST) { - fprintf(stderr, "%s%d estimated execution time: %d cycles\n", - stage_abbrev, dispatch_width, sched.time); - } - invalidate_live_intervals(); } @@ -1688,10 +1683,5 @@ vec4_visitor::opt_schedule_instructions() vec4_instruction_scheduler sched(this, prog_data->total_grf); sched.run(cfg); - if (unlikely(debug_enabled)) { - fprintf(stderr, "%s estimated execution time: %d cycles\n", - stage_abbrev, sched.time); - } - invalidate_live_intervals(); } |