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authorFrancisco Jerez <currojerez@riseup.net>2016-09-07 16:59:35 -0700
committerFrancisco Jerez <currojerez@riseup.net>2016-09-14 14:50:53 -0700
commitc458eeb94620fbce0a37474fc292545002d67f76 (patch)
tree06b73fa9a2c749190885aab742d0e3011dc050c2 /src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
parentbe095e11e41158f91bcb3f6fcbc2e2a91a5d9124 (diff)
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i965/fs: Add wrapper functions for fs_inst::regs_read and ::regs_written.
This is in preparation for dropping fs_inst::regs_read and ::regs_written in favor of more accurate alternatives expressed in byte units. The main reason these wrappers are useful is that a number of optimization passes implement dataflow analysis with register granularity, so these helpers will come in handy once we've switched register offsets and sizes to the byte representation. The wrapper functions will also make sure that GRF misalignment (currently neglected by most of the back-end) is taken into account correctly in the calculation of regs_read and regs_written. Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp')
-rw-r--r--src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp30
1 files changed, 15 insertions, 15 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index dde7554..0d3a07c 100644
--- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
@@ -620,7 +620,7 @@ fs_instruction_scheduler::count_reads_remaining(backend_instruction *be)
if (inst->src[i].nr >= hw_reg_count)
continue;
- for (int j = 0; j < inst->regs_read(i); j++)
+ for (unsigned j = 0; j < regs_read(inst, i); j++)
hw_reads_remaining[inst->src[i].nr + j]++;
}
}
@@ -702,7 +702,7 @@ fs_instruction_scheduler::update_register_pressure(backend_instruction *be)
reads_remaining[inst->src[i].nr]--;
} else if (inst->src[i].file == FIXED_GRF &&
inst->src[i].nr < hw_reg_count) {
- for (int off = 0; off < inst->regs_read(i); off++)
+ for (unsigned off = 0; off < regs_read(inst, i); off++)
hw_reads_remaining[inst->src[i].nr + off]--;
}
}
@@ -731,7 +731,7 @@ fs_instruction_scheduler::get_register_pressure_benefit(backend_instruction *be)
if (inst->src[i].file == FIXED_GRF &&
inst->src[i].nr < hw_reg_count) {
- for (int off = 0; off < inst->regs_read(i); off++) {
+ for (unsigned off = 0; off < regs_read(inst, i); off++) {
int reg = inst->src[i].nr + off;
if (!BITSET_TEST(hw_liveout[block_idx], reg) &&
hw_reads_remaining[reg] == 1) {
@@ -1004,17 +1004,17 @@ fs_instruction_scheduler::calculate_deps()
for (int i = 0; i < inst->sources; i++) {
if (inst->src[i].file == VGRF) {
if (post_reg_alloc) {
- for (int r = 0; r < inst->regs_read(i); r++)
+ for (unsigned r = 0; r < regs_read(inst, i); r++)
add_dep(last_grf_write[inst->src[i].nr + r], n);
} else {
- for (int r = 0; r < inst->regs_read(i); r++) {
+ for (unsigned r = 0; r < regs_read(inst, i); r++) {
add_dep(last_grf_write[inst->src[i].nr * 16 +
inst->src[i].offset / REG_SIZE + r], n);
}
}
} else if (inst->src[i].file == FIXED_GRF) {
if (post_reg_alloc) {
- for (int r = 0; r < inst->regs_read(i); r++)
+ for (unsigned r = 0; r < regs_read(inst, i); r++)
add_dep(last_grf_write[inst->src[i].nr + r], n);
} else {
add_dep(last_fixed_grf_write, n);
@@ -1052,12 +1052,12 @@ fs_instruction_scheduler::calculate_deps()
/* write-after-write deps. */
if (inst->dst.file == VGRF) {
if (post_reg_alloc) {
- for (int r = 0; r < inst->regs_written; r++) {
+ for (unsigned r = 0; r < regs_written(inst); r++) {
add_dep(last_grf_write[inst->dst.nr + r], n);
last_grf_write[inst->dst.nr + r] = n;
}
} else {
- for (int r = 0; r < inst->regs_written; r++) {
+ for (unsigned r = 0; r < regs_written(inst); r++) {
add_dep(last_grf_write[inst->dst.nr * 16 +
inst->dst.offset / REG_SIZE + r], n);
last_grf_write[inst->dst.nr * 16 +
@@ -1079,7 +1079,7 @@ fs_instruction_scheduler::calculate_deps()
}
} else if (inst->dst.file == FIXED_GRF) {
if (post_reg_alloc) {
- for (int r = 0; r < inst->regs_written; r++)
+ for (unsigned r = 0; r < regs_written(inst); r++)
last_grf_write[inst->dst.nr + r] = n;
} else {
last_fixed_grf_write = n;
@@ -1130,17 +1130,17 @@ fs_instruction_scheduler::calculate_deps()
for (int i = 0; i < inst->sources; i++) {
if (inst->src[i].file == VGRF) {
if (post_reg_alloc) {
- for (int r = 0; r < inst->regs_read(i); r++)
+ for (unsigned r = 0; r < regs_read(inst, i); r++)
add_dep(n, last_grf_write[inst->src[i].nr + r], 0);
} else {
- for (int r = 0; r < inst->regs_read(i); r++) {
+ for (unsigned r = 0; r < regs_read(inst, i); r++) {
add_dep(n, last_grf_write[inst->src[i].nr * 16 +
inst->src[i].offset / REG_SIZE + r], 0);
}
}
} else if (inst->src[i].file == FIXED_GRF) {
if (post_reg_alloc) {
- for (int r = 0; r < inst->regs_read(i); r++)
+ for (unsigned r = 0; r < regs_read(inst, i); r++)
add_dep(n, last_grf_write[inst->src[i].nr + r], 0);
} else {
add_dep(n, last_fixed_grf_write, 0);
@@ -1180,10 +1180,10 @@ fs_instruction_scheduler::calculate_deps()
*/
if (inst->dst.file == VGRF) {
if (post_reg_alloc) {
- for (int r = 0; r < inst->regs_written; r++)
+ for (unsigned r = 0; r < regs_written(inst); r++)
last_grf_write[inst->dst.nr + r] = n;
} else {
- for (int r = 0; r < inst->regs_written; r++) {
+ for (unsigned r = 0; r < regs_written(inst); r++) {
last_grf_write[inst->dst.nr * 16 +
inst->dst.offset / REG_SIZE + r] = n;
}
@@ -1203,7 +1203,7 @@ fs_instruction_scheduler::calculate_deps()
}
} else if (inst->dst.file == FIXED_GRF) {
if (post_reg_alloc) {
- for (int r = 0; r < inst->regs_written; r++)
+ for (unsigned r = 0; r < regs_written(inst); r++)
last_grf_write[inst->dst.nr + r] = n;
} else {
last_fixed_grf_write = n;