diff options
| author | Francisco Jerez <currojerez@riseup.net> | 2015-04-23 14:28:25 +0300 |
|---|---|---|
| committer | Francisco Jerez <currojerez@riseup.net> | 2015-05-04 15:05:21 +0300 |
| commit | f118e5d15fd9b35cf27a975a702c5fb81d3157aa (patch) | |
| tree | 186f15e6df7a6764bbdbc2826e142f37ec6a8145 /src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | |
| parent | 0775d8835ac8d1f2ab75d04f0cddbad36b6787fe (diff) | |
| download | external_mesa3d-f118e5d15fd9b35cf27a975a702c5fb81d3157aa.zip external_mesa3d-f118e5d15fd9b35cf27a975a702c5fb81d3157aa.tar.gz external_mesa3d-f118e5d15fd9b35cf27a975a702c5fb81d3157aa.tar.bz2 | |
i965: Add typed surface access opcodes.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp index a439399..34f75fd 100644 --- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp +++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp @@ -340,6 +340,7 @@ schedule_node::set_latency_gen7(bool is_haswell) break; case SHADER_OPCODE_UNTYPED_ATOMIC: + case SHADER_OPCODE_TYPED_ATOMIC: /* Test code: * mov(8) g112<1>ud 0x00000000ud { align1 WE_all 1Q }; * mov(1) g112.7<1>ud g1.7<0,1,0>ud { align1 WE_all }; @@ -359,6 +360,8 @@ schedule_node::set_latency_gen7(bool is_haswell) case SHADER_OPCODE_UNTYPED_SURFACE_READ: case SHADER_OPCODE_UNTYPED_SURFACE_WRITE: + case SHADER_OPCODE_TYPED_SURFACE_READ: + case SHADER_OPCODE_TYPED_SURFACE_WRITE: /* Test code: * mov(8) g112<1>UD 0x00000000UD { align1 WE_all 1Q }; * mov(1) g112.7<1>UD g1.7<0,1,0>UD { align1 WE_all }; |