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| author | Chris Forbes <chrisf@ijw.co.nz> | 2013-06-08 06:11:44 +1200 |
|---|---|---|
| committer | Chris Forbes <chrisf@ijw.co.nz> | 2013-06-16 01:05:41 +1200 |
| commit | def84d8014e334e00b0a76f7bb635ccc62e3b67e (patch) | |
| tree | 7bcf496e68de7d611788ca9da7ffd6eaa1b8f6b1 /src/mesa/drivers/dri/i965/brw_sf.c | |
| parent | 1b77d2133c41c4eb475b81967a3e4d39196c7fe1 (diff) | |
| download | external_mesa3d-def84d8014e334e00b0a76f7bb635ccc62e3b67e.zip external_mesa3d-def84d8014e334e00b0a76f7bb635ccc62e3b67e.tar.gz external_mesa3d-def84d8014e334e00b0a76f7bb635ccc62e3b67e.tar.bz2 | |
i965: Shrink Gen5 VUE map layout to be the same as Gen4.
The PRM suggests a larger layout, mostly to support having
gl_ClipDistance[] somewhere predictable for the fixed-function clipper
-- but it didn't actually arrive in Gen5.
Just use the same layout for both Gen4 and Gen5.
No Piglit regressions.
Improves performance in CS:S Video Stress Test by ~3%.
V2: - Remove now-useless function for determining the SF URB read offset
- Remove now-unused BRW_VARYING_SLOT_POS_DUPLICATE
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_sf.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_sf.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_sf.c b/src/mesa/drivers/dri/i965/brw_sf.c index 5870b60..ba8782b 100644 --- a/src/mesa/drivers/dri/i965/brw_sf.c +++ b/src/mesa/drivers/dri/i965/brw_sf.c @@ -76,7 +76,7 @@ static void compile_sf_prog( struct brw_context *brw, c.vue_map.varying_to_slot[BRW_VARYING_SLOT_PNTC] = c.vue_map.num_slots; c.vue_map.slot_to_varying[c.vue_map.num_slots++] = BRW_VARYING_SLOT_PNTC; } - c.urb_entry_read_offset = brw_sf_compute_urb_entry_read_offset(intel); + c.urb_entry_read_offset = BRW_SF_URB_ENTRY_READ_OFFSET; c.nr_attr_regs = (c.vue_map.num_slots + 1)/2 - c.urb_entry_read_offset; c.nr_setup_regs = c.nr_attr_regs; |