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authorMatt Turner <mattst88@gmail.com>2015-02-12 01:42:43 +0000
committerMatt Turner <mattst88@gmail.com>2015-02-19 21:16:44 -0800
commite0137fd6f720e4977466b1760ac02a72c5abceb8 (patch)
tree462f9756fc056ffa4b4e8b56052b2a87ecaa7ae1 /src/mesa/drivers/dri/i965/brw_shader.cpp
parentdada30462b8469509ef16fbc351764d42320b236 (diff)
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i965/vec4: Add and use byte-MOV instruction for unpack 4x8.
Previously we were using a B/UB source in an Align16 instruction, which is illegal. It for some reason works on all platforms, except Broadwell. Cc: "10.5" <mesa-stable@lists.freedesktop.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86811 Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_shader.cpp')
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index b0e9c82..fbb20bc 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -471,6 +471,8 @@ brw_instruction_name(enum opcode op)
case SHADER_OPCODE_URB_WRITE_SIMD8:
return "gen8_urb_write_simd8";
+ case VEC4_OPCODE_MOV_BYTES:
+ return "mov_bytes";
case VEC4_OPCODE_PACK_BYTES:
return "pack_bytes";
case VEC4_OPCODE_UNPACK_UNIFORM: