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authorFrancisco Jerez <currojerez@riseup.net>2015-04-23 14:28:25 +0300
committerFrancisco Jerez <currojerez@riseup.net>2015-05-04 15:05:21 +0300
commitf118e5d15fd9b35cf27a975a702c5fb81d3157aa (patch)
tree186f15e6df7a6764bbdbc2826e142f37ec6a8145 /src/mesa/drivers/dri/i965/brw_shader.cpp
parent0775d8835ac8d1f2ab75d04f0cddbad36b6787fe (diff)
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i965: Add typed surface access opcodes.
Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_shader.cpp')
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index df09c22..a2cb39d 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -496,6 +496,12 @@ brw_instruction_name(enum opcode op)
return "untyped_surface_read";
case SHADER_OPCODE_UNTYPED_SURFACE_WRITE:
return "untyped_surface_write";
+ case SHADER_OPCODE_TYPED_ATOMIC:
+ return "typed_atomic";
+ case SHADER_OPCODE_TYPED_SURFACE_READ:
+ return "typed_surface_read";
+ case SHADER_OPCODE_TYPED_SURFACE_WRITE:
+ return "typed_surface_write";
case SHADER_OPCODE_LOAD_PAYLOAD:
return "load_payload";
@@ -1041,6 +1047,8 @@ backend_instruction::has_side_effects() const
case SHADER_OPCODE_UNTYPED_ATOMIC:
case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
case SHADER_OPCODE_UNTYPED_SURFACE_WRITE:
+ case SHADER_OPCODE_TYPED_ATOMIC:
+ case SHADER_OPCODE_TYPED_SURFACE_WRITE:
case SHADER_OPCODE_URB_WRITE_SIMD8:
case FS_OPCODE_FB_WRITE:
return true;