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| author | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-06-06 20:36:11 -0700 |
|---|---|---|
| committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-07-15 16:01:43 -0700 |
| commit | efa7668545cd0ceaf6c2680b91d6d7d6f9afc141 (patch) | |
| tree | 66cdfb4d3534ff01efc974003175806b54b12cf6 /src/mesa/drivers/dri/i965/brw_state.h | |
| parent | 8521ce1a7ecb2e67f259d92c645a18ffbc49d347 (diff) | |
| download | external_mesa3d-efa7668545cd0ceaf6c2680b91d6d7d6f9afc141.zip external_mesa3d-efa7668545cd0ceaf6c2680b91d6d7d6f9afc141.tar.gz external_mesa3d-efa7668545cd0ceaf6c2680b91d6d7d6f9afc141.tar.bz2 | |
i965/gen7: Use the generic ISL-based path for renderbuffer surfaces
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_state.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_state.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index bdcb834..03f1e6d 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -296,13 +296,6 @@ void brw_update_renderbuffer_surfaces(struct brw_context *brw, uint32_t *surf_offset); /* gen7_wm_surface_state.c */ -uint32_t gen7_surface_tiling_mode(uint32_t tiling); -uint32_t gen7_surface_msaa_bits(unsigned num_samples, enum intel_msaa_layout l); -void gen7_set_surface_mcs_info(struct brw_context *brw, - uint32_t *surf, - uint32_t surf_offset, - const struct intel_mipmap_tree *mcs_mt, - bool is_render_target); void gen7_check_surface_setup(uint32_t *surf, bool is_render_target); void gen7_init_vtable_surface_functions(struct brw_context *brw); |