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authorCarl Worth <cworth@cworth.org>2015-02-11 13:53:31 -0800
committerCarl Worth <cworth@cworth.org>2015-02-23 14:54:15 -0800
commit4a6c6c49a7236b1471df143a697195f0c11eb23c (patch)
treefd48d43807ecd2ed00b414937b51cc1650321d2a /src/mesa/drivers/dri/i965/brw_state_upload.c
parent1e96eece300bbd2dd621a4941a4418222bb4c8e5 (diff)
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i965: Perform program state upload outside of atom handling
Across the board of the various generations, the intial few atoms in all of the atom lists are basically the same, (performing uploads for the various programs). The only difference is that prior to gen6 there's an ff_gs upload in place of the later gs upload. In this commit, instead of using the atom lists for this program state upload, we add a new function brw_upload_programs that calls into the per-stage upload functions which in turn check dirty bits and return immediately if nothing needs to be done. This commit is intended to have no functional change. The motivation is that future code, (such as the shader cache), wants to have a single function within which to perform various operations before and after program upload, (with some local variables holding state across the upload). It may be worth looking at whether some of the other functionality currently handled via atoms might also be more cleanly handled in a similar fashion. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_state_upload.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c35
1 files changed, 19 insertions, 16 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 84e5c10..1b84859 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -36,17 +36,17 @@
#include "drivers/common/meta.h"
#include "intel_batchbuffer.h"
#include "intel_buffers.h"
+#include "brw_vs.h"
+#include "brw_ff_gs.h"
+#include "brw_gs.h"
+#include "brw_wm.h"
static const struct brw_tracked_state *gen4_atoms[] =
{
- &brw_vs_prog, /* must do before GS prog, state base address. */
- &brw_ff_gs_prog, /* must do before state base address */
-
&brw_interpolation_map,
&brw_clip_prog, /* must do before state base address */
&brw_sf_prog, /* must do before state base address */
- &brw_wm_prog, /* must do before state base address */
/* Once all the programs are done, we know how large urb entry
* sizes need to be and can decide if we need to change the urb
@@ -107,10 +107,6 @@ static const struct brw_tracked_state *gen4_atoms[] =
static const struct brw_tracked_state *gen6_atoms[] =
{
- &brw_vs_prog, /* must do before state base address */
- &brw_gs_prog, /* must do before state base address */
- &brw_wm_prog, /* must do before state base address */
-
&gen6_clip_vp,
&gen6_sf_vp,
@@ -180,10 +176,6 @@ static const struct brw_tracked_state *gen6_atoms[] =
static const struct brw_tracked_state *gen7_atoms[] =
{
- &brw_vs_prog,
- &brw_gs_prog,
- &brw_wm_prog,
-
/* Command packets: */
/* must do before binding table pointers, cc state ptrs */
@@ -256,10 +248,6 @@ static const struct brw_tracked_state *gen7_atoms[] =
static const struct brw_tracked_state *gen8_atoms[] =
{
- &brw_vs_prog,
- &brw_gs_prog,
- &brw_wm_prog,
-
/* Command packets: */
&gen8_state_base_address,
@@ -565,6 +553,19 @@ brw_print_dirty_count(struct dirty_bit_map *bit_map)
}
}
+static void
+brw_upload_programs(struct brw_context *brw)
+{
+ brw_upload_vs_prog(brw);
+
+ if (brw->gen < 6)
+ brw_upload_ff_gs_prog(brw);
+ else
+ brw_upload_gs_prog(brw);
+
+ brw_upload_wm_prog(brw);
+}
+
/***********************************************************************
* Emit all state:
*/
@@ -619,6 +620,8 @@ void brw_upload_state(struct brw_context *brw)
if (brw->gen == 6)
intel_emit_post_sync_nonzero_flush(brw);
+ brw_upload_programs(brw);
+
if (unlikely(INTEL_DEBUG)) {
/* Debug version which enforces various sanity checks on the
* state flags which are generated and checked to help ensure