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| author | Francisco Jerez <currojerez@riseup.net> | 2016-09-01 22:04:02 -0700 |
|---|---|---|
| committer | Francisco Jerez <currojerez@riseup.net> | 2016-09-14 14:50:58 -0700 |
| commit | 1bb5074474445ea9f54d0f52383f99ac0fa6128f (patch) | |
| tree | 4a8b427036056dbcc0af7d2be31e386b064100d5 /src/mesa/drivers/dri/i965/brw_vec4.cpp | |
| parent | 3be0d6d040753c62b25077fb6b85ad1f0808b258 (diff) | |
| download | external_mesa3d-1bb5074474445ea9f54d0f52383f99ac0fa6128f.zip external_mesa3d-1bb5074474445ea9f54d0f52383f99ac0fa6128f.tar.gz external_mesa3d-1bb5074474445ea9f54d0f52383f99ac0fa6128f.tar.bz2 | |
i965/vec4: Compare full register offsets in opt_register_coalesce nop move check.
In preparation for adding support for sub-GRF offsets to the VEC4 IR.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index f97de18..d9dbc4c 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -1098,7 +1098,7 @@ vec4_visitor::opt_register_coalesce() /* Remove no-op MOVs */ if (inst->dst.file == inst->src[0].file && inst->dst.nr == inst->src[0].nr && - inst->dst.offset / REG_SIZE == inst->src[0].offset / REG_SIZE) { + inst->dst.offset == inst->src[0].offset) { bool is_nop_mov = true; for (unsigned c = 0; c < 4; c++) { |