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authorJason Ekstrand <jason.ekstrand@intel.com>2015-11-11 18:41:37 -0800
committerJason Ekstrand <jason.ekstrand@intel.com>2015-11-23 11:07:32 -0800
commitd9b8fde963a53d4e06570d8bece97f806714507a (patch)
treeed7e685f19282fa8bd3a82ebfae593bf40c5663f /src/mesa/drivers/dri/i965/brw_vec4.h
parent8537b4ab762ec4249acf23164e0e5a943d2d05af (diff)
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i965: Use NIR for lowering texture swizzle
Now that nir_lower_tex can do texture swizzle lowering, we can use that instead of repeating more-or-less the same code in both backends. This both allows us to share code and means that things like the tg4 work-arounds are somewhat simpler because they don't have to take the swizzle into account. Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4.h')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index ec8abf4..3f67432 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -275,13 +275,9 @@ public:
bool is_cube_array,
uint32_t sampler, src_reg sampler_reg);
- uint32_t gather_channel(unsigned gather_component, uint32_t sampler);
src_reg emit_mcs_fetch(const glsl_type *coordinate_type, src_reg coordinate,
src_reg sampler);
void emit_gen6_gather_wa(uint8_t wa, dst_reg dst);
- void swizzle_result(ir_texture_opcode op, dst_reg dest,
- src_reg orig_val, uint32_t sampler,
- const glsl_type *dest_type);
void emit_ndc_computation();
void emit_psiz_and_flags(dst_reg reg);