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| author | Matt Turner <mattst88@gmail.com> | 2016-02-11 12:27:02 -0800 |
|---|---|---|
| committer | Matt Turner <mattst88@gmail.com> | 2016-02-17 12:35:27 -0800 |
| commit | 2f2c00c7279e7c43e520e21de1781f8cec263e92 (patch) | |
| tree | d2a1d95b593bce622ba2a2f8c9c6d57196fa120e /src/mesa/drivers/dri/i965/brw_vec4_builder.h | |
| parent | 378d98f87e8048664309a66cb93ecf582e40d837 (diff) | |
| download | external_mesa3d-2f2c00c7279e7c43e520e21de1781f8cec263e92.zip external_mesa3d-2f2c00c7279e7c43e520e21de1781f8cec263e92.tar.gz external_mesa3d-2f2c00c7279e7c43e520e21de1781f8cec263e92.tar.bz2 | |
i965: Lower min/max after optimization on Gen4/5.
Gen4/5's SEL instruction cannot use conditional modifiers, so min/max
are implemented as CMP + SEL. Handling that after optimization lets us
CSE more.
On Ironlake:
total instructions in shared programs: 6426035 -> 6422753 (-0.05%)
instructions in affected programs: 326604 -> 323322 (-1.00%)
helped: 1411
total cycles in shared programs: 129184700 -> 129101586 (-0.06%)
cycles in affected programs: 18950290 -> 18867176 (-0.44%)
helped: 2419
HURT: 328
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4_builder.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_builder.h | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_builder.h b/src/mesa/drivers/dri/i965/brw_vec4_builder.h index 5d4b452..a0b390b 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_builder.h +++ b/src/mesa/drivers/dri/i965/brw_vec4_builder.h @@ -303,14 +303,8 @@ namespace brw { emit_minmax(const dst_reg &dst, const src_reg &src0, const src_reg &src1, brw_conditional_mod mod) const { - if (shader->devinfo->gen >= 6) { - set_condmod(mod, SEL(dst, fix_unsigned_negate(src0), - fix_unsigned_negate(src1))); - } else { - CMP(null_reg_d(), src0, src1, mod); - set_predicate(BRW_PREDICATE_NORMAL, - SEL(dst, src0, src1)); - } + set_condmod(mod, SEL(dst, fix_unsigned_negate(src0), + fix_unsigned_negate(src1))); } /** |