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| author | Jason Ekstrand <jason.ekstrand@intel.com> | 2015-11-11 09:40:51 -0800 |
|---|---|---|
| committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2015-11-23 11:02:15 -0800 |
| commit | 9cf108193b61c342c94c4cd980c4b403638e1051 (patch) | |
| tree | 34d541e6fcd6917210f9696341ca12ea5a98dedb /src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | |
| parent | 9d703de85a7bdd6ae767aedd7690cb82794cb90a (diff) | |
| download | external_mesa3d-9cf108193b61c342c94c4cd980c4b403638e1051.zip external_mesa3d-9cf108193b61c342c94c4cd980c4b403638e1051.tar.gz external_mesa3d-9cf108193b61c342c94c4cd980c4b403638e1051.tar.bz2 | |
i965/nir: Split shader optimization and lowering into three stages
At the moment, brw_create_nir just calls the three stages in sequence so
there's not much difference. Soon, however, we will want to start doing
variants in NIR at which point the postprocessing step will have to move
from shader create time to codegen time.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp')
0 files changed, 0 insertions, 0 deletions