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| author | Iago Toral Quiroga <itoral@igalia.com> | 2014-07-17 08:54:03 +0200 |
|---|---|---|
| committer | Iago Toral Quiroga <itoral@igalia.com> | 2014-09-19 15:01:15 +0200 |
| commit | f373b7ed820024080838742f419bbca5fcbde2bf (patch) | |
| tree | c656783589b26caf19e667b44614903792acdd4a /src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | |
| parent | 7ccd47d644962cbb6424a2e75de3b5317cbda62b (diff) | |
| download | external_mesa3d-f373b7ed820024080838742f419bbca5fcbde2bf.zip external_mesa3d-f373b7ed820024080838742f419bbca5fcbde2bf.tar.gz external_mesa3d-f373b7ed820024080838742f419bbca5fcbde2bf.tar.bz2 | |
i965/gen6/gs: Implement GS_OPCODE_SET_DWORD_2.
We had GS_OPCODE_SET_DWORD_2_IMMED but this required its source argument to be
an immediate. In gen6 we need to set dword 2 of the URB write message header
from values stored in separate register, so we need something more flexible.
This change replaces GS_OPCODE_SET_DWORD_2_IMMED with GS_OPCODE_SET_DWORD_2.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp index ad3204f..e0fd420 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp @@ -149,7 +149,7 @@ vec4_gs_visitor::emit_prolog() */ this->current_annotation = "clear r0.2"; dst_reg r0(retype(brw_vec4_grf(0, 0), BRW_REGISTER_TYPE_UD)); - vec4_instruction *inst = emit(GS_OPCODE_SET_DWORD_2_IMMED, r0, 0u); + vec4_instruction *inst = emit(GS_OPCODE_SET_DWORD_2, r0, 0u); inst->force_writemask_all = true; /* Create a virtual register to hold the vertex count */ |