diff options
| author | Kenneth Graunke <kenneth@whitecape.org> | 2016-01-07 15:54:16 -0800 |
|---|---|---|
| committer | Matt Turner <mattst88@gmail.com> | 2016-01-13 10:35:12 -0800 |
| commit | b85a229e1f542426b1c8000569d89cd4768b9339 (patch) | |
| tree | a770a5444309a93cc7e574f95935e7a5a62016c9 /src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | |
| parent | 92f177386954caced2e7ddca156917cf166f9c23 (diff) | |
| download | external_mesa3d-b85a229e1f542426b1c8000569d89cd4768b9339.zip external_mesa3d-b85a229e1f542426b1c8000569d89cd4768b9339.tar.gz external_mesa3d-b85a229e1f542426b1c8000569d89cd4768b9339.tar.bz2 | |
glsl: Delete the ir_binop_bfm and ir_triop_bfi opcodes.
TGSI doesn't use these - it just translates ir_quadop_bitfield_insert
directly. NIR can handle ir_quadop_bitfield_insert as well.
These opcodes were only used for i965, and with Jason's recent patches,
we can do this lowering in NIR (which also gains us SPIR-V handling).
So there's not much point to retaining this GLSL IR lowering code.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4_nir.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp index a3bdbc3..ecca166 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp @@ -1405,8 +1405,7 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr) break; case nir_op_bitfield_insert: - unreachable("not reached: should be handled by " - "lower_instructions::bitfield_insert_to_bfm_bfi"); + unreachable("not reached: should have been lowered"); case nir_op_fsign: /* AND(val, 0x80000000) gives the sign bit. |