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| author | Matt Turner <mattst88@gmail.com> | 2014-08-24 19:38:21 -0700 |
|---|---|---|
| committer | Matt Turner <mattst88@gmail.com> | 2014-09-24 09:42:46 -0700 |
| commit | 269b6e24d6ec61d8d8d0c5d1b3d1bfa4f4a55f5f (patch) | |
| tree | 60593488f3c4db9fa4307341c897f2a7497369aa /src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp | |
| parent | b0b64c85e4a0dafbb46405e4b3c17be24b63347f (diff) | |
| download | external_mesa3d-269b6e24d6ec61d8d8d0c5d1b3d1bfa4f4a55f5f.zip external_mesa3d-269b6e24d6ec61d8d8d0c5d1b3d1bfa4f4a55f5f.tar.gz external_mesa3d-269b6e24d6ec61d8d8d0c5d1b3d1bfa4f4a55f5f.tar.bz2 | |
i965/vec4: Preserve CFG in spill_reg().
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp index 29feec0..15779b7 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp @@ -28,6 +28,7 @@ extern "C" { #include "brw_vec4.h" #include "brw_vs.h" +#include "brw_cfg.h" using namespace brw; @@ -326,8 +327,10 @@ vec4_visitor::spill_reg(int spill_reg_nr) assert(virtual_grf_sizes[spill_reg_nr] == 1); unsigned int spill_offset = c->last_scratch++; + calculate_cfg(); + /* Generate spill/unspill instructions for the objects being spilled. */ - foreach_in_list(vec4_instruction, inst, &instructions) { + foreach_block_and_inst(block, vec4_instruction, inst, cfg) { for (unsigned int i = 0; i < 3; i++) { if (inst->src[i].file == GRF && inst->src[i].reg == spill_reg_nr) { src_reg spill_reg = inst->src[i]; @@ -342,16 +345,16 @@ vec4_visitor::spill_reg(int spill_reg_nr) temp.writemask |= (1 << BRW_GET_SWZ(inst->src[i].swizzle, c)); assert(temp.writemask != 0); - emit_scratch_read(inst, temp, spill_reg, spill_offset); + emit_scratch_read(block, inst, temp, spill_reg, spill_offset); } } if (inst->dst.file == GRF && inst->dst.reg == spill_reg_nr) { - emit_scratch_write(inst, spill_offset); + emit_scratch_write(block, inst, spill_offset); } } - invalidate_live_intervals(); + invalidate_live_intervals(false); } } /* namespace brw */ |