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author | Matt Turner <mattst88@gmail.com> | 2014-09-01 13:42:51 -0700 |
---|---|---|
committer | Matt Turner <mattst88@gmail.com> | 2014-09-24 09:42:46 -0700 |
commit | 90bfeb22444df6ce779251522e47bf169e130f8e (patch) | |
tree | 5246dc1482cbb452955ef976ef59bafb1339cee3 /src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp | |
parent | 2ff0ff880c14f246a419ae3949b2462617e485e1 (diff) | |
download | external_mesa3d-90bfeb22444df6ce779251522e47bf169e130f8e.zip external_mesa3d-90bfeb22444df6ce779251522e47bf169e130f8e.tar.gz external_mesa3d-90bfeb22444df6ce779251522e47bf169e130f8e.tar.bz2 |
i965/vec4: Don't use instruction list after calculating the cfg.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp index b7426d2..828a70e 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp @@ -57,7 +57,7 @@ vec4_visitor::reg_allocate_trivial() virtual_grf_used[i] = false; } - foreach_in_list(vec4_instruction, inst, &instructions) { + foreach_block_and_inst(block, vec4_instruction, inst, cfg) { if (inst->dst.file == GRF) virtual_grf_used[inst->dst.reg] = true; @@ -77,7 +77,7 @@ vec4_visitor::reg_allocate_trivial() } prog_data->total_grf = next; - foreach_in_list(vec4_instruction, inst, &instructions) { + foreach_block_and_inst(block, vec4_instruction, inst, cfg) { assign(hw_reg_mapping, &inst->dst); assign(hw_reg_mapping, &inst->src[0]); assign(hw_reg_mapping, &inst->src[1]); @@ -238,7 +238,7 @@ vec4_visitor::reg_allocate() hw_reg_mapping[i] + virtual_grf_sizes[i]); } - foreach_in_list(vec4_instruction, inst, &instructions) { + foreach_block_and_inst(block, vec4_instruction, inst, cfg) { assign(hw_reg_mapping, &inst->dst); assign(hw_reg_mapping, &inst->src[0]); assign(hw_reg_mapping, &inst->src[1]); @@ -264,7 +264,7 @@ vec4_visitor::evaluate_spill_costs(float *spill_costs, bool *no_spill) * spill/unspill we'll have to do, and guess that the insides of * loops run 10 times. */ - foreach_in_list(vec4_instruction, inst, &instructions) { + foreach_block_and_inst(block, vec4_instruction, inst, cfg) { for (unsigned int i = 0; i < 3; i++) { if (inst->src[i].file == GRF) { spill_costs[inst->src[i].reg] += loop_scale; |