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author | Francisco Jerez <currojerez@riseup.net> | 2013-11-22 19:21:13 -0800 |
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committer | Francisco Jerez <currojerez@riseup.net> | 2014-02-19 16:27:25 +0100 |
commit | af25addcd0aaf373bd91c6a0b6c97d4c73092f91 (patch) | |
tree | 28188f7e06bc512be06114aa7d1d03c7aa1de9c7 /src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp | |
parent | a32817f3c248125fb537c3a915566445e5600d45 (diff) | |
download | external_mesa3d-af25addcd0aaf373bd91c6a0b6c97d4c73092f91.zip external_mesa3d-af25addcd0aaf373bd91c6a0b6c97d4c73092f91.tar.gz external_mesa3d-af25addcd0aaf373bd91c6a0b6c97d4c73092f91.tar.bz2 |
i965/vec4: Fix off-by-one register class overallocation.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp index 4ecc4a2..e7aab9d 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp @@ -121,7 +121,7 @@ brw_vec4_alloc_reg_set(struct brw_context *brw) if (brw->gen >= 6) ra_set_allocate_round_robin(brw->vec4.regs); ralloc_free(brw->vec4.classes); - brw->vec4.classes = ralloc_array(brw, int, class_count + 1); + brw->vec4.classes = ralloc_array(brw, int, class_count); /* Now, add the registers to their classes, and add the conflicts * between them and the base GRF registers (and also each other). |