i965: Rename GRF to VGRF.

The 2-bit hardware register file field is ARF, GRF, MRF, IMM.

Rename GRF to VGRF (virtual GRF) so that we can reuse the GRF name to
mean an assigned general purpose register.

Reviewed-by: Emil Velikov <emil.velikov@collabora.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

1 files changed, 13 insertions, 13 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
index adad4e5..6d27a46 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
@@ -34,7 +34,7 @@ namespace brw {
 static void
 assign(unsigned int *reg_hw_locations, backend_reg *reg)
 {
-   if (reg->file == GRF) {
+   if (reg->file == VGRF) {
       reg->nr = reg_hw_locations[reg->nr] + reg->reg_offset;
       reg->reg_offset = 0;
    }
@@ -55,11 +55,11 @@ vec4_visitor::reg_allocate_trivial()
    }
 
    foreach_block_and_inst(block, vec4_instruction, inst, cfg) {
-      if (inst->dst.file == GRF)
+      if (inst->dst.file == VGRF)
          virtual_grf_used[inst->dst.nr] = true;
 
       for (unsigned i = 0; i < 3; i++) {
-	 if (inst->src[i].file == GRF)
+	 if (inst->src[i].file == VGRF)
             virtual_grf_used[inst->src[i].nr] = true;
       }
    }
@@ -292,12 +292,12 @@ static bool
 can_use_scratch_for_source(const vec4_instruction *inst, unsigned i,
                            unsigned scratch_reg)
 {
-   assert(inst->src[i].file == GRF);
+   assert(inst->src[i].file == VGRF);
    bool prev_inst_read_scratch_reg = false;
 
    /* See if any previous source in the same instructions reads scratch_reg */
    for (unsigned n = 0; n < i; n++) {
-      if (inst->src[n].file == GRF && inst->src[n].nr == scratch_reg)
+      if (inst->src[n].file == VGRF && inst->src[n].nr == scratch_reg)
          prev_inst_read_scratch_reg = true;
    }
 
@@ -310,7 +310,7 @@ can_use_scratch_for_source(const vec4_instruction *inst, unsigned i,
        * it if the write is not conditional and the channels we write are
        * compatible with our read mask
        */
-      if (prev_inst->dst.file == GRF && prev_inst->dst.nr == scratch_reg) {
+      if (prev_inst->dst.file == VGRF && prev_inst->dst.nr == scratch_reg) {
          return (!prev_inst->predicate || prev_inst->opcode == BRW_OPCODE_SEL) &&
                 (brw_mask_for_swizzle(inst->src[i].swizzle) &
                  ~prev_inst->dst.writemask) == 0;
@@ -329,7 +329,7 @@ can_use_scratch_for_source(const vec4_instruction *inst, unsigned i,
        */
       int n;
       for (n = 0; n < 3; n++) {
-         if (prev_inst->src[n].file == GRF &&
+         if (prev_inst->src[n].file == VGRF &&
              prev_inst->src[n].nr == scratch_reg) {
             prev_inst_read_scratch_reg = true;
             break;
@@ -374,7 +374,7 @@ vec4_visitor::evaluate_spill_costs(float *spill_costs, bool *no_spill)
     */
    foreach_block_and_inst(block, vec4_instruction, inst, cfg) {
       for (unsigned int i = 0; i < 3; i++) {
-         if (inst->src[i].file == GRF) {
+         if (inst->src[i].file == VGRF) {
             /* We will only unspill src[i] it it wasn't unspilled for the
              * previous instruction, in which case we'll just reuse the scratch
              * reg for this instruction.
@@ -387,7 +387,7 @@ vec4_visitor::evaluate_spill_costs(float *spill_costs, bool *no_spill)
          }
       }
 
-      if (inst->dst.file == GRF) {
+      if (inst->dst.file == VGRF) {
          spill_costs[inst->dst.nr] += loop_scale;
          if (inst->dst.reladdr)
             no_spill[inst->dst.nr] = true;
@@ -406,10 +406,10 @@ vec4_visitor::evaluate_spill_costs(float *spill_costs, bool *no_spill)
       case SHADER_OPCODE_GEN4_SCRATCH_READ:
       case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
          for (int i = 0; i < 3; i++) {
-            if (inst->src[i].file == GRF)
+            if (inst->src[i].file == VGRF)
                no_spill[inst->src[i].nr] = true;
          }
-         if (inst->dst.file == GRF)
+         if (inst->dst.file == VGRF)
             no_spill[inst->dst.nr] = true;
          break;
 
@@ -445,7 +445,7 @@ vec4_visitor::spill_reg(int spill_reg_nr)
    int scratch_reg = -1;
    foreach_block_and_inst(block, vec4_instruction, inst, cfg) {
       for (unsigned int i = 0; i < 3; i++) {
-         if (inst->src[i].file == GRF && inst->src[i].nr == spill_reg_nr) {
+         if (inst->src[i].file == VGRF && inst->src[i].nr == spill_reg_nr) {
             if (scratch_reg == -1 ||
                 !can_use_scratch_for_source(inst, i, scratch_reg)) {
                /* We need to unspill anyway so make sure we read the full vec4
@@ -465,7 +465,7 @@ vec4_visitor::spill_reg(int spill_reg_nr)
          }
       }
 
-      if (inst->dst.file == GRF && inst->dst.nr == spill_reg_nr) {
+      if (inst->dst.file == VGRF && inst->dst.nr == spill_reg_nr) {
          emit_scratch_write(block, inst, spill_offset);
          scratch_reg = inst->dst.nr;
       }