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| author | Paul Berry <stereotype441@gmail.com> | 2013-02-17 07:48:21 -0800 |
|---|---|---|
| committer | Paul Berry <stereotype441@gmail.com> | 2013-04-11 09:25:24 -0700 |
| commit | 5fff3752c88255ea3f4eb26cddb2c996694b33b1 (patch) | |
| tree | 7563f6d4fd13a91c3ee86e302f0df18fa67f9e70 /src/mesa/drivers/dri/i965/brw_vs_state.c | |
| parent | 0c994f181ce1a09cdbb7db27e4ad5565248bf8e1 (diff) | |
| download | external_mesa3d-5fff3752c88255ea3f4eb26cddb2c996694b33b1.zip external_mesa3d-5fff3752c88255ea3f4eb26cddb2c996694b33b1.tar.gz external_mesa3d-5fff3752c88255ea3f4eb26cddb2c996694b33b1.tar.bz2 | |
i965/vs: split brw_vs_prog_data into generic and VS-specific parts.
This will allow the generic parts to be re-used for geometry shaders.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
v2: Put urb_read_length and urb_entry_size in the generic struct.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vs_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vs_state.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vs_state.c b/src/mesa/drivers/dri/i965/brw_vs_state.c index a72a283..bb42bd0 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_state.c +++ b/src/mesa/drivers/dri/i965/brw_vs_state.c @@ -47,7 +47,8 @@ brw_upload_vs_unit(struct brw_context *brw) memset(vs, 0, sizeof(*vs)); /* BRW_NEW_PROGRAM_CACHE | CACHE_NEW_VS_PROG */ - vs->thread0.grf_reg_count = ALIGN(brw->vs.prog_data->total_grf, 16) / 16 - 1; + vs->thread0.grf_reg_count = + ALIGN(brw->vs.prog_data->base.total_grf, 16) / 16 - 1; vs->thread0.kernel_start_pointer = brw_program_reloc(brw, brw->vs.state_offset + @@ -72,18 +73,19 @@ brw_upload_vs_unit(struct brw_context *brw) vs->thread1.binding_table_entry_count = 0; - if (brw->vs.prog_data->total_scratch != 0) { + if (brw->vs.prog_data->base.total_scratch != 0) { vs->thread2.scratch_space_base_pointer = brw->vs.scratch_bo->offset >> 10; /* reloc */ vs->thread2.per_thread_scratch_space = - ffs(brw->vs.prog_data->total_scratch) - 11; + ffs(brw->vs.prog_data->base.total_scratch) - 11; } else { vs->thread2.scratch_space_base_pointer = 0; vs->thread2.per_thread_scratch_space = 0; } - vs->thread3.urb_entry_read_length = brw->vs.prog_data->urb_read_length; - vs->thread3.const_urb_entry_read_length = brw->vs.prog_data->curb_read_length; + vs->thread3.urb_entry_read_length = brw->vs.prog_data->base.urb_read_length; + vs->thread3.const_urb_entry_read_length + = brw->vs.prog_data->base.curb_read_length; vs->thread3.dispatch_grf_start_reg = 1; vs->thread3.urb_entry_read_offset = 0; @@ -144,7 +146,7 @@ brw_upload_vs_unit(struct brw_context *brw) vs->vs6.vs_enable = 1; /* Emit scratch space relocation */ - if (brw->vs.prog_data->total_scratch != 0) { + if (brw->vs.prog_data->base.total_scratch != 0) { drm_intel_bo_emit_reloc(intel->batch.bo, brw->vs.state_offset + offsetof(struct brw_vs_unit_state, thread2), |