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| author | Kenneth Graunke <kenneth@whitecape.org> | 2014-09-02 11:38:29 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2014-09-03 17:11:33 -0700 |
| commit | f92fbd554f2e9e702a2bd650c9b2571a3f4f1ab8 (patch) | |
| tree | b6e24c2b40ae16c6c4f636f93b881d4c5e4815dc /src/mesa/drivers/dri/i965/brw_vs_state.c | |
| parent | 7528f6fd178ef10b7fde8e66c57bec38127471fd (diff) | |
| download | external_mesa3d-f92fbd554f2e9e702a2bd650c9b2571a3f4f1ab8.zip external_mesa3d-f92fbd554f2e9e702a2bd650c9b2571a3f4f1ab8.tar.gz external_mesa3d-f92fbd554f2e9e702a2bd650c9b2571a3f4f1ab8.tar.bz2 | |
i965: Move curb_read_length/total_scratch to brw_stage_prog_data.
All shader stages have these fields, so it makes sense to store them in
the common base structure, rather than duplicating them in each.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vs_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vs_state.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vs_state.c b/src/mesa/drivers/dri/i965/brw_vs_state.c index e05d3f9..53ac335 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_state.c +++ b/src/mesa/drivers/dri/i965/brw_vs_state.c @@ -82,11 +82,11 @@ brw_upload_vs_unit(struct brw_context *brw) vs->thread1.binding_table_entry_count = brw->vs.prog_data->base.base.binding_table.size_bytes / 4; - if (brw->vs.prog_data->base.total_scratch != 0) { + if (brw->vs.prog_data->base.base.total_scratch != 0) { vs->thread2.scratch_space_base_pointer = stage_state->scratch_bo->offset64 >> 10; /* reloc */ vs->thread2.per_thread_scratch_space = - ffs(brw->vs.prog_data->base.total_scratch) - 11; + ffs(brw->vs.prog_data->base.base.total_scratch) - 11; } else { vs->thread2.scratch_space_base_pointer = 0; vs->thread2.per_thread_scratch_space = 0; @@ -94,7 +94,7 @@ brw_upload_vs_unit(struct brw_context *brw) vs->thread3.urb_entry_read_length = brw->vs.prog_data->base.urb_read_length; vs->thread3.const_urb_entry_read_length - = brw->vs.prog_data->base.curb_read_length; + = brw->vs.prog_data->base.base.curb_read_length; vs->thread3.dispatch_grf_start_reg = brw->vs.prog_data->base.base.dispatch_grf_start_reg; vs->thread3.urb_entry_read_offset = 0; @@ -172,7 +172,7 @@ brw_upload_vs_unit(struct brw_context *brw) } /* Emit scratch space relocation */ - if (brw->vs.prog_data->base.total_scratch != 0) { + if (brw->vs.prog_data->base.base.total_scratch != 0) { drm_intel_bo_emit_reloc(brw->batch.bo, stage_state->state_offset + offsetof(struct brw_vs_unit_state, thread2), |