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author | Kenneth Graunke <kenneth@whitecape.org> | 2014-09-02 11:38:29 -0700 |
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committer | Kenneth Graunke <kenneth@whitecape.org> | 2014-09-03 17:11:33 -0700 |
commit | f92fbd554f2e9e702a2bd650c9b2571a3f4f1ab8 (patch) | |
tree | b6e24c2b40ae16c6c4f636f93b881d4c5e4815dc /src/mesa/drivers/dri/i965/brw_wm_state.c | |
parent | 7528f6fd178ef10b7fde8e66c57bec38127471fd (diff) | |
download | external_mesa3d-f92fbd554f2e9e702a2bd650c9b2571a3f4f1ab8.zip external_mesa3d-f92fbd554f2e9e702a2bd650c9b2571a3f4f1ab8.tar.gz external_mesa3d-f92fbd554f2e9e702a2bd650c9b2571a3f4f1ab8.tar.bz2 |
i965: Move curb_read_length/total_scratch to brw_stage_prog_data.
All shader stages have these fields, so it makes sense to store them in
the common base structure, rather than duplicating them in each.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_wm_state.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_state.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c index 3fd8821..58f2cf8 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_state.c @@ -124,11 +124,11 @@ brw_upload_wm_unit(struct brw_context *brw) wm->thread1.binding_table_entry_count = brw->wm.prog_data->base.binding_table.size_bytes / 4; - if (brw->wm.prog_data->total_scratch != 0) { + if (brw->wm.prog_data->base.total_scratch != 0) { wm->thread2.scratch_space_base_pointer = brw->wm.base.scratch_bo->offset64 >> 10; /* reloc */ wm->thread2.per_thread_scratch_space = - ffs(brw->wm.prog_data->total_scratch) - 11; + ffs(brw->wm.prog_data->base.total_scratch) - 11; } else { wm->thread2.scratch_space_base_pointer = 0; wm->thread2.per_thread_scratch_space = 0; @@ -140,7 +140,7 @@ brw_upload_wm_unit(struct brw_context *brw) brw->wm.prog_data->num_varying_inputs * 2; wm->thread3.urb_entry_read_offset = 0; wm->thread3.const_urb_entry_read_length = - brw->wm.prog_data->curb_read_length; + brw->wm.prog_data->base.curb_read_length; /* BRW_NEW_CURBE_OFFSETS */ wm->thread3.const_urb_entry_read_offset = brw->curbe.wm_start * 2; @@ -219,7 +219,7 @@ brw_upload_wm_unit(struct brw_context *brw) wm->wm4.stats_enable = 1; /* Emit scratch space relocation */ - if (brw->wm.prog_data->total_scratch != 0) { + if (brw->wm.prog_data->base.total_scratch != 0) { drm_intel_bo_emit_reloc(brw->batch.bo, brw->wm.base.state_offset + offsetof(struct brw_wm_unit_state, thread2), |