summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
diff options
context:
space:
mode:
authorJason Ekstrand <jason.ekstrand@intel.com>2016-07-18 09:13:01 -0700
committerJason Ekstrand <jason.ekstrand@intel.com>2016-07-18 16:44:29 -0700
commit905d7dc4d164b7ccc287b390a5b2492da3e0fd8b (patch)
tree61a57c1e823b05e4c2323aa5c1a85f929be63e61 /src/mesa/drivers/dri/i965/brw_wm_surface_state.c
parentcd5cbf0f6b69557ef0c6123c11f9732d43490f4f (diff)
downloadexternal_mesa3d-905d7dc4d164b7ccc287b390a5b2492da3e0fd8b.zip
external_mesa3d-905d7dc4d164b7ccc287b390a5b2492da3e0fd8b.tar.gz
external_mesa3d-905d7dc4d164b7ccc287b390a5b2492da3e0fd8b.tar.bz2
i965: Skip update_texture_surface when the plane doesn't exist
Thanks to rebase fail, recent surface state changes (commits 7e951cd56, 8521ce1a7, and 69c0dc5c53) effectively reverted 727a9b24933 and 367cf3a2e3e which was unintentional. This should bring it back. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_wm_surface_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c18
1 files changed, 10 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index c1a7579..d896789 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -385,6 +385,13 @@ brw_update_texture_surface(struct gl_context *ctx,
} else {
struct intel_texture_object *intel_obj = intel_texture_object(obj);
struct intel_mipmap_tree *mt = intel_obj->mt;
+
+ if (plane > 0) {
+ if (mt->plane[plane - 1] == NULL)
+ return;
+ mt = mt->plane[plane - 1];
+ }
+
struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
/* If this is a view with restricted NumLayers, then our effective depth
* is not just the miptree depth.
@@ -406,8 +413,9 @@ brw_update_texture_surface(struct gl_context *ctx,
const unsigned swizzle = (unlikely(alpha_depth) ? SWIZZLE_XYZW :
brw_get_texture_swizzle(&brw->ctx, obj));
- unsigned format = translate_tex_format(
- brw, intel_obj->_Format, sampler->sRGBDecode);
+ mesa_format mesa_fmt = plane == 0 ? intel_obj->_Format : mt->format;
+ unsigned format = translate_tex_format(brw, mesa_fmt,
+ sampler->sRGBDecode);
/* Implement gen6 and gen7 gather work-around */
bool need_green_to_blue = false;
@@ -449,12 +457,6 @@ brw_update_texture_surface(struct gl_context *ctx,
assert(brw->gen >= 8);
mt = mt->stencil_mt;
format = BRW_SURFACEFORMAT_R8_UINT;
- } else if (obj->Target == GL_TEXTURE_EXTERNAL_OES) {
- if (plane > 0)
- mt = mt->plane[plane - 1];
- if (mt == NULL)
- return;
- format = translate_tex_format(brw, mt->format, sampler->sRGBDecode);
}
const int surf_index = surf_offset - &brw->wm.base.surf_offset[0];