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author | Eric Anholt <eric@anholt.net> | 2013-06-18 13:52:03 -0700 |
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committer | Eric Anholt <eric@anholt.net> | 2013-11-07 10:20:33 -0800 |
commit | 185b5a54c94ce11487146042c8eec24909187ed6 (patch) | |
tree | 0b2cdf65e9527f5d8772a8616cc96e4ea3bbd42b /src/mesa/drivers/dri/i965/gen6_blorp.cpp | |
parent | fd03dd6ddd96afe782d8686fcba437d23c878da1 (diff) | |
download | external_mesa3d-185b5a54c94ce11487146042c8eec24909187ed6.zip external_mesa3d-185b5a54c94ce11487146042c8eec24909187ed6.tar.gz external_mesa3d-185b5a54c94ce11487146042c8eec24909187ed6.tar.bz2 |
i965: Avoid flushing the batch for every blorp op.
This brings over the batch-wrap-prevention and aperture space checking
code from the normal brw_draw.c path, so that we don't need to flush the
batch every time.
There's a risk here if the intel_emit_post_sync_nonzero_flush() call isn't
high enough up in the state emit sequences -- before, we implicitly had
one at the batch flush before any state was emitted, so Mesa's workaround
emits didn't really matter. Since the SNB fixes by Ken, I didn't see any
regressions after 3 piglit runs.
Improves cairo-gl performance by 13.7733% +/- 1.74876% (n=30/32)
Improves minecraft apitrace performance by 1.03183% +/- 0.482297% (n=90).
Reduces low-resolution GLB 2.7 performance by 1.17553% +/- 0.432263% (n=88)
Reduces Lightsmark performance by 3.70246% +/- 0.322432% (n=126)
No statistically significant performance difference on unigine tropics
(n=10)
No statistically significant performance difference on openarena (n=755)
The two apps that are hurt happen to include stalls on busy buffer
objects, so I think this is an effect of missing out on an opportune
flush.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen6_blorp.cpp')
-rw-r--r-- | src/mesa/drivers/dri/i965/gen6_blorp.cpp | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index 8735270..8fb8ca1 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -45,17 +45,6 @@ * sizeof(float)) /** \} */ -void -gen6_blorp_emit_batch_head(struct brw_context *brw, - const brw_blorp_params *params) -{ - /* To ensure that the batch contains only the resolve, flush the batch - * before beginning and after finishing emitting the resolve packets. - */ - intel_batchbuffer_flush(brw); -} - - /** * CMD_STATE_BASE_ADDRESS * @@ -1045,7 +1034,6 @@ gen6_blorp_exec(struct brw_context *brw, uint32_t wm_bind_bo_offset = 0; uint32_t prog_offset = params->get_wm_prog(brw, &prog_data); - gen6_blorp_emit_batch_head(brw, params); gen6_emit_3dstate_multisample(brw, params->num_samples); gen6_emit_3dstate_sample_mask(brw, params->num_samples, 1.0, false, ~0u); gen6_blorp_emit_state_base_address(brw, params); |