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| author | Eric Anholt <eric@anholt.net> | 2014-04-25 11:36:38 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2014-05-01 15:12:26 -0700 |
| commit | 3033f80af5dbc0858907df3c41ccf7b9de8a01a4 (patch) | |
| tree | b4f5442c65d27154fee7391e9a3f64ff9bfb4504 /src/mesa/drivers/dri/i965/gen6_blorp.cpp | |
| parent | 9791eb4280a5814de9af6d9197d947221342dc4e (diff) | |
| download | external_mesa3d-3033f80af5dbc0858907df3c41ccf7b9de8a01a4.zip external_mesa3d-3033f80af5dbc0858907df3c41ccf7b9de8a01a4.tar.gz external_mesa3d-3033f80af5dbc0858907df3c41ccf7b9de8a01a4.tar.bz2 | |
i965: Move intel_region_get_aligned_offset() to be a miptree function.
All the consumers are doing it on a miptree.
v2: fix a silly duplicated dereference (review by Ken)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net> (v1)
Reviewed-by: Chad Versace <chad.versace@linux.intel.com> (v1)
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen6_blorp.cpp')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen6_blorp.cpp | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index 4222fa8..903cb78 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -804,9 +804,9 @@ gen6_blorp_emit_depth_stencil_config(struct brw_context *brw, uint32_t tile_x = draw_x & tile_mask_x; uint32_t tile_y = draw_y & tile_mask_y; uint32_t offset = - intel_region_get_aligned_offset(params->depth.mt->region, - draw_x & ~tile_mask_x, - draw_y & ~tile_mask_y, false); + intel_miptree_get_aligned_offset(params->depth.mt, + draw_x & ~tile_mask_x, + draw_y & ~tile_mask_y, false); /* According to the Sandy Bridge PRM, volume 2 part 1, pp326-327 * (3DSTATE_DEPTH_BUFFER dw5), in the documentation for "Depth @@ -856,16 +856,16 @@ gen6_blorp_emit_depth_stencil_config(struct brw_context *brw, /* 3DSTATE_HIER_DEPTH_BUFFER */ { - struct intel_region *hiz_region = params->depth.mt->hiz_mt->region; + struct intel_mipmap_tree *hiz_mt = params->depth.mt->hiz_mt; uint32_t hiz_offset = - intel_region_get_aligned_offset(hiz_region, - draw_x & ~tile_mask_x, - (draw_y & ~tile_mask_y) / 2, false); + intel_miptree_get_aligned_offset(hiz_mt, + draw_x & ~tile_mask_x, + (draw_y & ~tile_mask_y) / 2, false); BEGIN_BATCH(3); OUT_BATCH((_3DSTATE_HIER_DEPTH_BUFFER << 16) | (3 - 2)); - OUT_BATCH(hiz_region->pitch - 1); - OUT_RELOC(hiz_region->bo, + OUT_BATCH(hiz_mt->region->pitch - 1); + OUT_RELOC(hiz_mt->region->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, hiz_offset); ADVANCE_BATCH(); |