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author | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2016-04-12 00:18:45 +0300 |
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committer | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2016-04-21 10:20:03 +0300 |
commit | aa322f8ae5be1bbb32ecdacb0984d79c242f4a95 (patch) | |
tree | a0d1d62d41d6d8f8c31880ff4eb98b97eae6db8d /src/mesa/drivers/dri/i965/gen6_blorp.cpp | |
parent | 87d333f2fe9e0be458eeff21ea70087ba524e9fa (diff) | |
download | external_mesa3d-aa322f8ae5be1bbb32ecdacb0984d79c242f4a95.zip external_mesa3d-aa322f8ae5be1bbb32ecdacb0984d79c242f4a95.tar.gz external_mesa3d-aa322f8ae5be1bbb32ecdacb0984d79c242f4a95.tar.bz2 |
i965/blorp: Skip uploading state/options not needed for clears
In case there is no source it means the program does a simple
clear or a resolve. In such case there is no need to program
sampling state or enable pixel kill in fragment shader.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen6_blorp.cpp')
-rw-r--r-- | src/mesa/drivers/dri/i965/gen6_blorp.cpp | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index cbb4355..b741e19 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -692,13 +692,16 @@ gen6_blorp_emit_wm_config(struct brw_context *brw, dw6 |= 0 << GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT; /* No interp */ dw6 |= 0 << GEN6_WM_NUM_SF_OUTPUTS_SHIFT; /* No inputs from SF */ if (params->use_wm_prog) { - dw2 |= 1 << GEN6_WM_SAMPLER_COUNT_SHIFT; /* Up to 4 samplers */ dw4 |= prog_data->first_curbe_grf << GEN6_WM_DISPATCH_START_GRF_SHIFT_0; dw5 |= GEN6_WM_16_DISPATCH_ENABLE; - dw5 |= GEN6_WM_KILL_ENABLE; /* TODO: temporarily smash on */ dw5 |= GEN6_WM_DISPATCH_ENABLE; /* We are rendering */ } + if (params->src.mt) { + dw5 |= GEN6_WM_KILL_ENABLE; /* TODO: temporarily smash on */ + dw2 |= 1 << GEN6_WM_SAMPLER_COUNT_SHIFT; /* Up to 4 samplers */ + } + if (params->dst.num_samples > 1) { dw6 |= GEN6_WM_MSRAST_ON_PATTERN; if (prog_data && prog_data->persample_msaa_dispatch) @@ -1044,7 +1047,6 @@ gen6_blorp_exec(struct brw_context *brw, if (params->use_wm_prog) { uint32_t wm_surf_offset_renderbuffer; uint32_t wm_surf_offset_texture = 0; - uint32_t sampler_offset; wm_push_const_offset = gen6_blorp_emit_wm_constants(brw, params); intel_miptree_used_for_rendering(params->dst.mt); wm_surf_offset_renderbuffer = @@ -1060,7 +1062,10 @@ gen6_blorp_exec(struct brw_context *brw, gen6_blorp_emit_binding_table(brw, wm_surf_offset_renderbuffer, wm_surf_offset_texture); - sampler_offset = + } + + if (params->src.mt) { + const uint32_t sampler_offset = gen6_blorp_emit_sampler_state(brw, BRW_MAPFILTER_LINEAR, 0, true); gen6_blorp_emit_sampler_state_pointers(brw, sampler_offset); } |