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| author | Kenneth Graunke <kenneth@whitecape.org> | 2013-07-02 23:17:14 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2013-07-09 14:08:53 -0700 |
| commit | ca437579b3974b91a5298707c459908a628c1098 (patch) | |
| tree | 294ac2ad5aa080554c23ebb79552e50b23fbcf31 /src/mesa/drivers/dri/i965/gen6_multisample_state.c | |
| parent | 86f2711722dc10c25c2fabc09d8bd020a1ba6029 (diff) | |
| download | external_mesa3d-ca437579b3974b91a5298707c459908a628c1098.zip external_mesa3d-ca437579b3974b91a5298707c459908a628c1098.tar.gz external_mesa3d-ca437579b3974b91a5298707c459908a628c1098.tar.bz2 | |
i965: Pass brw_context to functions rather than intel_context.
This makes brw_context available in every function that used
intel_context. This makes it possible to start migrating fields from
intel_context to brw_context.
Surprisingly, this actually removes some code, as functions that use
OUT_BATCH don't need to declare "intel"; they just use "brw."
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen6_multisample_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen6_multisample_state.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_multisample_state.c b/src/mesa/drivers/dri/i965/gen6_multisample_state.c index 534abc2..3247bb9 100644 --- a/src/mesa/drivers/dri/i965/gen6_multisample_state.c +++ b/src/mesa/drivers/dri/i965/gen6_multisample_state.c @@ -149,8 +149,6 @@ gen6_emit_3dstate_sample_mask(struct brw_context *brw, unsigned num_samples, float coverage, bool coverage_invert, unsigned sample_mask) { - struct intel_context *intel = &brw->intel; - BEGIN_BATCH(2); OUT_BATCH(_3DSTATE_SAMPLE_MASK << 16 | (2 - 2)); if (num_samples > 1) { @@ -189,7 +187,7 @@ static void upload_multisample_state(struct brw_context *brw) } /* 3DSTATE_MULTISAMPLE is nonpipelined. */ - intel_emit_post_sync_nonzero_flush(intel); + intel_emit_post_sync_nonzero_flush(brw); gen6_emit_3dstate_multisample(brw, num_samples); gen6_emit_3dstate_sample_mask(brw, num_samples, coverage, |