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| author | Eric Anholt <eric@anholt.net> | 2014-05-06 16:37:05 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2014-10-24 23:17:14 -0700 |
| commit | 08599f668c5d991ab19376a19cb2e14e5245db95 (patch) | |
| tree | d1b915c451aaf4488968275ebfbc4d74d79214c9 /src/mesa/drivers/dri/i965/gen6_urb.c | |
| parent | b0e0c26f0214739108dbf0d6ae9596caf13287ee (diff) | |
| download | external_mesa3d-08599f668c5d991ab19376a19cb2e14e5245db95.zip external_mesa3d-08599f668c5d991ab19376a19cb2e14e5245db95.tar.gz external_mesa3d-08599f668c5d991ab19376a19cb2e14e5245db95.tar.bz2 | |
i965: Skip recalculating URB allocations if the entry size didn't change.
We only get here if the VS/GS compiled programs change, but we can even
skip it if the VS/GS size didn't change.
Affects cairo runtime on glamor by -1.26471% +/- 0.674335% (n=234)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen6_urb.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen6_urb.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_urb.c b/src/mesa/drivers/dri/i965/gen6_urb.c index 7af1f37..46cc4cc2 100644 --- a/src/mesa/drivers/dri/i965/gen6_urb.c +++ b/src/mesa/drivers/dri/i965/gen6_urb.c @@ -119,9 +119,9 @@ gen6_upload_urb( struct brw_context *brw ) * doesn't exist on Gen6). So for now we just do a full pipeline flush as * a workaround. */ - if (brw->urb.gen6_gs_previously_active && !gs_present) + if (brw->urb.gs_present && !gs_present) intel_batchbuffer_emit_mi_flush(brw); - brw->urb.gen6_gs_previously_active = gs_present; + brw->urb.gs_present = gs_present; } const struct brw_tracked_state gen6_urb = { |