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| author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-12-06 15:15:55 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-12-06 15:20:48 +0800 |
| commit | 2b1469340bbf910469449354eeb5c02a9acfedba (patch) | |
| tree | 8e49970e6e7ddfc8768d090f2dd81ff456891ddf /src/mesa/drivers/dri/i965/gen6_urb.c | |
| parent | 08be8d64509f60d2cc80112f5b94f43e06e94ff2 (diff) | |
| download | external_mesa3d-2b1469340bbf910469449354eeb5c02a9acfedba.zip external_mesa3d-2b1469340bbf910469449354eeb5c02a9acfedba.tar.gz external_mesa3d-2b1469340bbf910469449354eeb5c02a9acfedba.tar.bz2 | |
i965: Fix GS state uploading on Sandybridge
Need to check the required primitive type for GS on Sandybridge,
and when GS is disabled, the new state has to be issued too, instead
of only updating URB state with no GS entry, that caused hang on Sandybridge.
This fixes hang issue during conformance suite testing.
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen6_urb.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen6_urb.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_urb.c b/src/mesa/drivers/dri/i965/gen6_urb.c index a341234..de97fd3 100644 --- a/src/mesa/drivers/dri/i965/gen6_urb.c +++ b/src/mesa/drivers/dri/i965/gen6_urb.c @@ -72,7 +72,7 @@ const struct brw_tracked_state gen6_urb = { .dirty = { .mesa = 0, .brw = BRW_NEW_CONTEXT, - .cache = CACHE_NEW_VS_PROG, + .cache = (CACHE_NEW_VS_PROG | CACHE_NEW_GS_PROG), }, .prepare = prepare_urb, .emit = upload_urb, |