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| author | Paul Berry <stereotype441@gmail.com> | 2013-08-24 08:24:57 -0700 |
|---|---|---|
| committer | Paul Berry <stereotype441@gmail.com> | 2013-08-31 17:11:05 -0700 |
| commit | ec94e3c3d02857e26ba66e7e6a4b54044c820a0a (patch) | |
| tree | a7041f672def8f00315d961f26e3a6d1be429e4b /src/mesa/drivers/dri/i965/gen6_vs_state.c | |
| parent | cdf03b69282d12f9d27daf2edb3abb351f5de7f6 (diff) | |
| download | external_mesa3d-ec94e3c3d02857e26ba66e7e6a4b54044c820a0a.zip external_mesa3d-ec94e3c3d02857e26ba66e7e6a4b54044c820a0a.tar.gz external_mesa3d-ec94e3c3d02857e26ba66e7e6a4b54044c820a0a.tar.bz2 | |
i965: Move data from brw->vs into a base class if gs will also need it.
This paves the way for sharing the code that will set up the vertex
and geometry shader pipeline state.
v2: Rename the base class to brw_stage_state.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen6_vs_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen6_vs_state.c | 23 |
1 files changed, 13 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.c index c5f2fd0..0342a22 100644 --- a/src/mesa/drivers/dri/i965/gen6_vs_state.c +++ b/src/mesa/drivers/dri/i965/gen6_vs_state.c @@ -37,6 +37,8 @@ static void gen6_upload_vs_push_constants(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; + struct brw_stage_state *stage_state = &brw->vs.base; + /* _BRW_NEW_VERTEX_PROGRAM */ const struct brw_vertex_program *vp = brw_vertex_program_const(brw->vertex_program); @@ -49,7 +51,7 @@ gen6_upload_vs_push_constants(struct brw_context *brw) /* CACHE_NEW_VS_PROG */ if (brw->vs.prog_data->base.nr_params == 0) { - brw->vs.push_const_size = 0; + stage_state->push_const_size = 0; } else { int params_uploaded; float *param; @@ -57,7 +59,7 @@ gen6_upload_vs_push_constants(struct brw_context *brw) param = brw_state_batch(brw, AUB_TRACE_VS_CONSTANTS, brw->vs.prog_data->base.nr_params * sizeof(float), - 32, &brw->vs.push_const_offset); + 32, &stage_state->push_const_offset); /* _NEW_PROGRAM_CONSTANTS * @@ -79,9 +81,9 @@ gen6_upload_vs_push_constants(struct brw_context *brw) } } - brw->vs.push_const_size = (params_uploaded + 1) / 2; + stage_state->push_const_size = (params_uploaded + 1) / 2; /* We can only push 32 registers of constants at a time. */ - assert(brw->vs.push_const_size <= 32); + assert(stage_state->push_const_size <= 32); } } @@ -99,6 +101,7 @@ static void upload_vs_state(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; + const struct brw_stage_state *stage_state = &brw->vs.base; uint32_t floating_point_mode = 0; /* From the BSpec, 3D Pipeline > Geometry > Vertex Shader > State, @@ -114,7 +117,7 @@ upload_vs_state(struct brw_context *brw) */ intel_emit_post_sync_nonzero_flush(brw); - if (brw->vs.push_const_size == 0) { + if (stage_state->push_const_size == 0) { /* Disable the push constant buffers. */ BEGIN_BATCH(5); OUT_BATCH(_3DSTATE_CONSTANT_VS << 16 | (5 - 2)); @@ -131,8 +134,8 @@ upload_vs_state(struct brw_context *brw) /* Pointer to the VS constant buffer. Covered by the set of * state flags from gen6_upload_vs_constants */ - OUT_BATCH(brw->vs.push_const_offset + - brw->vs.push_const_size - 1); + OUT_BATCH(stage_state->push_const_offset + + stage_state->push_const_size - 1); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); @@ -147,12 +150,12 @@ upload_vs_state(struct brw_context *brw) BEGIN_BATCH(6); OUT_BATCH(_3DSTATE_VS << 16 | (6 - 2)); - OUT_BATCH(brw->vs.prog_offset); + OUT_BATCH(stage_state->prog_offset); OUT_BATCH(floating_point_mode | - ((ALIGN(brw->vs.sampler_count, 4)/4) << GEN6_VS_SAMPLER_COUNT_SHIFT)); + ((ALIGN(stage_state->sampler_count, 4)/4) << GEN6_VS_SAMPLER_COUNT_SHIFT)); if (brw->vs.prog_data->base.total_scratch) { - OUT_RELOC(brw->vs.scratch_bo, + OUT_RELOC(stage_state->scratch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, ffs(brw->vs.prog_data->base.total_scratch) - 11); } else { |