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authorPaul Berry <stereotype441@gmail.com>2012-07-09 12:50:31 -0700
committerPaul Berry <stereotype441@gmail.com>2012-07-20 09:35:38 -0700
commit989218b9801f0afd0cbadce19a5719b0aa0deb70 (patch)
tree98c9e0eff1be3ef68b931d051a246a23ecc71af9 /src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
parentf91b4d92b97664e6354f66138705e93bec363ba0 (diff)
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i965/blorp: Configure SURFACE_STATE correctly for IMS surfaces.
This patch modifies gen7_set_surface_num_multisamples() to set up the SURFACE_STATE appropriately for texturing from IMS format MSAA surfaces (which are only used on Gen7 for depth and stencil buffers). Since the function now sets more than just the number of multisamples, it's been renamed to gen7_set_surface_msaa(). This will make it possible to remove some kludginess from the blorp engine. Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen7_wm_surface_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/gen7_wm_surface_state.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index f037026..869f943 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -56,8 +56,8 @@ gen7_set_surface_tiling(struct gen7_surface_state *surf, uint32_t tiling)
void
-gen7_set_surface_num_multisamples(struct gen7_surface_state *surf,
- unsigned num_samples)
+gen7_set_surface_msaa(struct gen7_surface_state *surf, unsigned num_samples,
+ enum intel_msaa_layout layout)
{
if (num_samples > 4)
surf->ss4.num_multisamples = GEN7_SURFACE_MULTISAMPLECOUNT_8;
@@ -65,6 +65,11 @@ gen7_set_surface_num_multisamples(struct gen7_surface_state *surf,
surf->ss4.num_multisamples = GEN7_SURFACE_MULTISAMPLECOUNT_4;
else
surf->ss4.num_multisamples = GEN7_SURFACE_MULTISAMPLECOUNT_1;
+
+ surf->ss4.multisampled_surface_storage_format =
+ layout == INTEL_MSAA_LAYOUT_IMS ?
+ GEN7_SURFACE_MSFMT_DEPTH_STENCIL :
+ GEN7_SURFACE_MSFMT_MSS;
}
@@ -490,7 +495,7 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
gen7_set_surface_tiling(surf, region->tiling);
surf->ss3.pitch = (region->pitch * region->cpp) - 1;
- gen7_set_surface_num_multisamples(surf, irb->mt->num_samples);
+ gen7_set_surface_msaa(surf, irb->mt->num_samples, irb->mt->msaa_layout);
if (irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS) {
gen7_set_surface_mcs_info(brw, surf, brw->wm.surf_offset[unit],