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author | Neil Roberts <neil@linux.intel.com> | 2015-09-09 14:36:42 +0100 |
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committer | Neil Roberts <neil@linux.intel.com> | 2015-11-05 10:33:16 +0100 |
commit | b4c2e6054fe830c299113b143622bcd2158cd257 (patch) | |
tree | e06738272fd7567e0d38cb8d89d37f10c16e050d /src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | |
parent | 1a97cac767425b22e56fe698127795bc287bb773 (diff) | |
download | external_mesa3d-b4c2e6054fe830c299113b143622bcd2158cd257.zip external_mesa3d-b4c2e6054fe830c299113b143622bcd2158cd257.tar.gz external_mesa3d-b4c2e6054fe830c299113b143622bcd2158cd257.tar.bz2 |
i965: Support calculating the bits needed to set up 16x MSAA
The gen7_surface_msaa_bits function already returns the right values
for 16 samples but it just needs its assert to be relaxed.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen7_wm_surface_state.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index 5080f1c..438caef 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -78,7 +78,7 @@ gen7_surface_msaa_bits(unsigned num_samples, enum intel_msaa_layout layout) { uint32_t ss4 = 0; - assert(num_samples <= 8); + assert(num_samples <= 16); /* The SURFACE_MULTISAMPLECOUNT_X enums are simply log2(num_samples) << 3. */ ss4 |= (ffs(MAX2(num_samples, 1)) - 1) << 3; |