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| author | Francisco Jerez <currojerez@riseup.net> | 2015-02-09 21:04:53 +0200 |
|---|---|---|
| committer | Francisco Jerez <currojerez@riseup.net> | 2015-08-11 15:07:39 +0300 |
| commit | 786e0853bebc3c4ab073bdbb48eec8ba5ea93842 (patch) | |
| tree | d4b2fb2cb6a4c742dd3ac9506ba66366700da9ae /src/mesa/drivers/dri/i965/gen8_depth_state.c | |
| parent | ac7664e493655e290783c23a0412b9c70936da50 (diff) | |
| download | external_mesa3d-786e0853bebc3c4ab073bdbb48eec8ba5ea93842.zip external_mesa3d-786e0853bebc3c4ab073bdbb48eec8ba5ea93842.tar.gz external_mesa3d-786e0853bebc3c4ab073bdbb48eec8ba5ea93842.tar.bz2 | |
i965/gen7-8: Set up early depth/stencil control appropriately for image load/store.
v2: Store early fragment test mode in brw_wm_prog_data instead of
getting it from core mesa data structures (Ken).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen8_depth_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen8_depth_state.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c index 8f23702..93100a0 100644 --- a/src/mesa/drivers/dri/i965/gen8_depth_state.c +++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c @@ -250,10 +250,10 @@ pma_fix_enable(const struct brw_context *brw) */ const bool hiz_enabled = depth_irb && intel_renderbuffer_has_hiz(depth_irb); - /* 3DSTATE_WM::Early Depth/Stencil Control != EDSC_PREPS (2). - * We always leave this set to EDSC_NORMAL (0). + /* BRW_NEW_FS_PROG_DATA: + * 3DSTATE_WM::Early Depth/Stencil Control != EDSC_PREPS (2). */ - const bool edsc_not_preps = true; + const bool edsc_not_preps = !brw->wm.prog_data->early_fragment_tests; /* 3DSTATE_PS_EXTRA::PixelShaderValid is always true. */ const bool pixel_shader_valid = true; |