diff options
| author | Kenneth Graunke <kenneth@whitecape.org> | 2015-06-24 00:04:11 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2015-06-25 02:18:51 -0700 |
| commit | c97105ee12e54ab893351ebbda8c2348c899adde (patch) | |
| tree | 65909bb02a7eea183c1e90ce945b3096583de0e4 /src/mesa/drivers/dri/i965/gen8_depth_state.c | |
| parent | 6026f7e8fb993a34f3e2ad1638d7a842a5cefd80 (diff) | |
| download | external_mesa3d-c97105ee12e54ab893351ebbda8c2348c899adde.zip external_mesa3d-c97105ee12e54ab893351ebbda8c2348c899adde.tar.gz external_mesa3d-c97105ee12e54ab893351ebbda8c2348c899adde.tar.bz2 | |
i965: Drop brw->depthstencil.stencil_offset from gen8_depth_state.c.
This is always 0 - only brw_workaround_depthstencil_alignment ever sets
it, and that doesn't run on Gen6+. My initial Broadwell depth state
commit had this mistake.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen8_depth_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen8_depth_state.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c index 81447f8..bc05a31 100644 --- a/src/mesa/drivers/dri/i965/gen8_depth_state.c +++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c @@ -41,7 +41,6 @@ emit_depth_packets(struct brw_context *brw, bool depth_writable, struct intel_mipmap_tree *stencil_mt, bool stencil_writable, - uint32_t stencil_offset, bool hiz, uint32_t width, uint32_t height, @@ -127,8 +126,7 @@ emit_depth_packets(struct brw_context *brw, OUT_BATCH(HSW_STENCIL_ENABLED | mocs_wb << 22 | (2 * stencil_mt->pitch - 1)); OUT_RELOC64(stencil_mt->bo, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - stencil_offset); + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(stencil_mt ? stencil_mt->qpitch >> 2 : 0); ADVANCE_BATCH(); } @@ -220,7 +218,6 @@ gen8_emit_depth_stencil_hiz(struct brw_context *brw, emit_depth_packets(brw, depth_mt, brw_depthbuffer_format(brw), surftype, ctx->Depth.Mask != 0, stencil_mt, ctx->Stencil._WriteEnabled, - brw->depthstencil.stencil_offset, hiz, width, height, depth, lod, min_array_element); } @@ -439,7 +436,7 @@ gen8_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, brw_depth_format(brw, mt->format), BRW_SURFACE_2D, true, /* depth writes */ - NULL, false, 0, /* no stencil for now */ + NULL, false, /* no stencil for now */ true, /* hiz */ surface_width, surface_height, |