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authorKenneth Graunke <kenneth@whitecape.org>2013-12-06 03:07:54 -0800
committerKenneth Graunke <kenneth@whitecape.org>2014-01-31 17:50:08 -0800
commit3ade766684933ac84e41634429fb693f85353c11 (patch)
tree0b387175744ba5c36a7106e08641fe795a6ae8ee /src/mesa/drivers/dri/i965/gen8_disable.c
parent4c4e0ed64bceca57e19c0a9f53aae77d795aa937 (diff)
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i965: Disable 3DSTATE_WM_HZ_OP fields.
Eric believes this to be wrong and unnecessary, as the command is supposed to emit an implicit rectangle primitive. However, empirically the pixel pipeline is completely unreliable without it. So for now, it stays until someone comes up with a better solution. We'll need to do better than this when we implement multisampling, HiZ, or fast clears...but for now, this will do. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Acked-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen8_disable.c')
-rw-r--r--src/mesa/drivers/dri/i965/gen8_disable.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_disable.c b/src/mesa/drivers/dri/i965/gen8_disable.c
index e1e26c6..276bd2e 100644
--- a/src/mesa/drivers/dri/i965/gen8_disable.c
+++ b/src/mesa/drivers/dri/i965/gen8_disable.c
@@ -29,6 +29,14 @@
static void
disable_stages(struct brw_context *brw)
{
+ BEGIN_BATCH(5);
+ OUT_BATCH(_3DSTATE_WM_HZ_OP << 16 | (5 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+
/* Disable the HS Unit */
BEGIN_BATCH(11);
OUT_BATCH(_3DSTATE_CONSTANT_HS << 16 | (11 - 2));