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| author | Kenneth Graunke <kenneth@whitecape.org> | 2015-12-17 21:17:07 -0800 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2015-12-22 17:22:02 -0800 |
| commit | 9d35fecfb94e26a5fe6b361ebe83044fae9131bf (patch) | |
| tree | 7aee874f811e38abd7ca8daa84111910afa51ce7 /src/mesa/drivers/dri/i965/gen8_hs_state.c | |
| parent | f46dbfaed914e0e3463f3a28fc877695cd7e7834 (diff) | |
| download | external_mesa3d-9d35fecfb94e26a5fe6b361ebe83044fae9131bf.zip external_mesa3d-9d35fecfb94e26a5fe6b361ebe83044fae9131bf.tar.gz external_mesa3d-9d35fecfb94e26a5fe6b361ebe83044fae9131bf.tar.bz2 | |
i965: Remove unnecessary brw->tess_ctrl_program assertions.
This is trying to enforce the fact that the hardware requires HS, TE,
and DS to be enabled or disabled together. But it's kind of an ad-hoc
attempt, and not too useful.
More importantly, we aren't going to have a gl_shader_program for the
TCS which is automatically generated when none is present. (We'll just
handle it in the driver backend.) So, these will trip for no reason.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen8_hs_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen8_hs_state.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_hs_state.c b/src/mesa/drivers/dri/i965/gen8_hs_state.c index 1277420..b12f99e 100644 --- a/src/mesa/drivers/dri/i965/gen8_hs_state.c +++ b/src/mesa/drivers/dri/i965/gen8_hs_state.c @@ -32,7 +32,6 @@ gen8_upload_hs_state(struct brw_context *brw) const struct brw_stage_state *stage_state = &brw->tcs.base; /* BRW_NEW_TESS_PROGRAMS */ bool active = brw->tess_ctrl_program; - assert(!active || brw->tess_eval_program); /* BRW_NEW_HS_PROG_DATA */ const struct brw_vue_prog_data *prog_data = &brw->tcs.prog_data->base; |