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| author | Iago Toral Quiroga <itoral@igalia.com> | 2015-02-03 12:34:29 +0100 |
|---|---|---|
| committer | Iago Toral Quiroga <itoral@igalia.com> | 2015-04-06 08:07:42 +0200 |
| commit | 47597f8f5cfe950093110d2b777923ef85c5d24f (patch) | |
| tree | 1752552d774dbb569f2b861bd31a1e0b8b4c6f15 /src/mesa/drivers/dri/i965/gen8_surface_state.c | |
| parent | 8b0b81339b9c3806981ee2ec7c08501bbd8bb7a3 (diff) | |
| download | external_mesa3d-47597f8f5cfe950093110d2b777923ef85c5d24f.zip external_mesa3d-47597f8f5cfe950093110d2b777923ef85c5d24f.tar.gz external_mesa3d-47597f8f5cfe950093110d2b777923ef85c5d24f.tar.bz2 | |
i965: Make sure we always mark array surfaces as such
Even if they only have one slice, otherwise textureSize() won't
produce correct results for the depth value.
Fixes 10 dEQP tests in this category:
dEQP-GLES3.functional.shaders.texture_functions.texturesize.sampler2darray*
Reviewed-by: Mark Janes <mark.a.janes at intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen8_surface_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen8_surface_state.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index 7f82f53..0007c95 100644 --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c @@ -25,6 +25,7 @@ #include "main/mtypes.h" #include "main/samplerobj.h" #include "main/texformat.h" +#include "main/teximage.h" #include "program/prog_parameter.h" #include "intel_mipmap_tree.h" @@ -208,7 +209,8 @@ gen8_update_texture_surface(struct gl_context *ctx, surf[0] |= BRW_SURFACE_CUBEFACE_ENABLES; } - if (mt->logical_depth0 > 1 && tObj->Target != GL_TEXTURE_3D) + if (_mesa_is_array_texture(tObj->Target) || + tObj->Target == GL_TEXTURE_CUBE_MAP) surf[0] |= GEN8_SURFACE_IS_ARRAY; surf[1] = SET_FIELD(mocs_wb, GEN8_SURFACE_MOCS) | mt->qpitch >> 2; |