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| author | Kenneth Graunke <kenneth@whitecape.org> | 2014-07-31 01:26:30 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2015-01-04 21:31:40 -0800 |
| commit | 546425726387ffceb71989e08028c386d21dedfd (patch) | |
| tree | 09560f9f52495d7eec57f71f1c2d62277cd1b0ff /src/mesa/drivers/dri/i965/gen8_surface_state.c | |
| parent | f3ad1804eb83399cbb59a21427b4a9677193ea23 (diff) | |
| download | external_mesa3d-546425726387ffceb71989e08028c386d21dedfd.zip external_mesa3d-546425726387ffceb71989e08028c386d21dedfd.tar.gz external_mesa3d-546425726387ffceb71989e08028c386d21dedfd.tar.bz2 | |
i965: Micro-optimize swizzle_to_scs() and make it inlinable.
brw_swizzle_to_scs has been showing up in my CPU profiling, which is
rather silly - it's a tiny amount of code. It really should be inlined,
and can easily be implemented with fewer instructions.
The enum translation is as follows:
SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W, SWIZZLE_ZERO, SWIZZLE_ONE
0 1 2 3 4 5
4 5 6 7 0 1
SCS_RED, SCS_GREEN, SCS_BLUE, SCS_ALPHA, SCS_ZERO, SCS_ONE
which is simply (swizzle + 4) & 7.
Haswell needs extra textureGather workarounds to remap GREEN to BLUE,
but Broadwell and later do not.
This patch replicates swizzle_to_scs in gen7_wm_surface_state.c and
gen8_surface_state.c, since the Gen8+ code can be simplified to a mere
two instructions. Both copies can be marked static for easy inlining.
v2: Put the commit message in the code as comments (requested by
Jason Ekstrand). Also fix a typo.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen8_surface_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen8_surface_state.c | 25 |
1 files changed, 21 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index 56c46b0..d1b095c 100644 --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c @@ -38,6 +38,23 @@ #include "brw_defines.h" #include "brw_wm.h" +/** + * Convert an swizzle enumeration (i.e. SWIZZLE_X) to one of the Gen7.5+ + * "Shader Channel Select" enumerations (i.e. HSW_SCS_RED). The mappings are + * + * SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W, SWIZZLE_ZERO, SWIZZLE_ONE + * 0 1 2 3 4 5 + * 4 5 6 7 0 1 + * SCS_RED, SCS_GREEN, SCS_BLUE, SCS_ALPHA, SCS_ZERO, SCS_ONE + * + * which is simply adding 4 then modding by 8 (or anding with 7). + */ +static unsigned +swizzle_to_scs(unsigned swizzle) +{ + return (swizzle + 4) & 7; +} + static uint32_t surface_tiling_mode(uint32_t tiling) { @@ -231,10 +248,10 @@ gen8_update_texture_surface(struct gl_context *ctx, const int swizzle = unlikely(alpha_depth) ? SWIZZLE_XYZW : brw_get_texture_swizzle(ctx, tObj); surf[7] |= - SET_FIELD(brw_swizzle_to_scs(GET_SWZ(swizzle, 0), false), GEN7_SURFACE_SCS_R) | - SET_FIELD(brw_swizzle_to_scs(GET_SWZ(swizzle, 1), false), GEN7_SURFACE_SCS_G) | - SET_FIELD(brw_swizzle_to_scs(GET_SWZ(swizzle, 2), false), GEN7_SURFACE_SCS_B) | - SET_FIELD(brw_swizzle_to_scs(GET_SWZ(swizzle, 3), false), GEN7_SURFACE_SCS_A); + SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 0)), GEN7_SURFACE_SCS_R) | + SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 1)), GEN7_SURFACE_SCS_G) | + SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 2)), GEN7_SURFACE_SCS_B) | + SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 3)), GEN7_SURFACE_SCS_A); *((uint64_t *) &surf[8]) = mt->bo->offset64 + mt->offset; /* reloc */ |