summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965/gen8_surface_state.c
diff options
context:
space:
mode:
authorTopi Pohjolainen <topi.pohjolainen@intel.com>2015-12-09 14:44:21 +0200
committerTopi Pohjolainen <topi.pohjolainen@intel.com>2016-05-12 19:49:22 +0300
commit874c5f05dbc8eca2d14a14f32fdd964808c53b7e (patch)
treeccde052139ec4f4cfc82eb1a337e2e033a74e4ec /src/mesa/drivers/dri/i965/gen8_surface_state.c
parenta8544267fd7936885db3b192c85c1b1f488039a4 (diff)
downloadexternal_mesa3d-874c5f05dbc8eca2d14a14f32fdd964808c53b7e.zip
external_mesa3d-874c5f05dbc8eca2d14a14f32fdd964808c53b7e.tar.gz
external_mesa3d-874c5f05dbc8eca2d14a14f32fdd964808c53b7e.tar.bz2
i965/gen9: Prepare surface state setup for lossless compression
v2 (Ben): Use combination of msaa_layout and number of samples instead of introducing explicit type for lossless compression (intel_miptree_is_lossless_compressed()). v3 (Ben): Do not set fast claer state in surface state setup. Moved into brw_postdraw_set_buffers_need_resolve() using a separate patch. v4: Support for blorp v5 (Ben): Re-use gen8_get_aux_mode() Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen8_surface_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/gen8_surface_state.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 4f9a6e9..4b9896f 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -216,6 +216,9 @@ gen8_get_aux_mode(const struct brw_context *brw,
if (brw->gen >= 9 || mt->num_samples == 1)
assert(mt->halign == 16);
+ if (intel_miptree_is_lossless_compressed(brw, mt))
+ return GEN9_SURFACE_AUX_MODE_CCS_E;
+
return GEN8_SURFACE_AUX_MODE_MCS;
}