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author | Jordan Justen <jordan.l.justen@intel.com> | 2016-04-19 09:38:50 -0700 |
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committer | Jordan Justen <jordan.l.justen@intel.com> | 2016-05-04 11:23:17 -0700 |
commit | 357ff9135973a43233c2fe7e758a1840b906af39 (patch) | |
tree | f4b957175c1d117b48115bb01ec90bdb026da826 /src/mesa/drivers/dri/i965/intel_batchbuffer.c | |
parent | 959e1e9e6668f9b0e7c480febcaab1e2995fb54b (diff) | |
download | external_mesa3d-357ff9135973a43233c2fe7e758a1840b906af39.zip external_mesa3d-357ff9135973a43233c2fe7e758a1840b906af39.tar.gz external_mesa3d-357ff9135973a43233c2fe7e758a1840b906af39.tar.bz2 |
i965/gen6+: Add load register immediate helper functions
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_batchbuffer.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_batchbuffer.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index 33927af..98b9485 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c @@ -602,6 +602,38 @@ brw_store_register_mem64(struct brw_context *brw, } /* + * Write a 32-bit register using immediate data. + */ +void +brw_load_register_imm32(struct brw_context *brw, uint32_t reg, uint32_t imm) +{ + assert(brw->gen >= 6); + + BEGIN_BATCH(3); + OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2)); + OUT_BATCH(reg); + OUT_BATCH(imm); + ADVANCE_BATCH(); +} + +/* + * Write a 64-bit register using immediate data. + */ +void +brw_load_register_imm64(struct brw_context *brw, uint32_t reg, uint64_t imm) +{ + assert(brw->gen >= 6); + + BEGIN_BATCH(5); + OUT_BATCH(MI_LOAD_REGISTER_IMM | (5 - 2)); + OUT_BATCH(reg); + OUT_BATCH(imm & 0xffffffff); + OUT_BATCH(reg + 4); + OUT_BATCH(imm >> 32); + ADVANCE_BATCH(); +} + +/* * Copies a 32-bit register. */ void |