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| author | Matt Turner <mattst88@gmail.com> | 2015-07-08 18:59:51 -0700 |
|---|---|---|
| committer | Matt Turner <mattst88@gmail.com> | 2015-07-15 13:09:22 -0700 |
| commit | 09348c12fceba59c22219fe3272260eb8ea6051e (patch) | |
| tree | c0665d4a1de844e725d6026be1e367b27b87af3b /src/mesa/drivers/dri/i965/intel_batchbuffer.h | |
| parent | fbf3aebf1f33fbec559c5b69bdf3b5dec6031612 (diff) | |
| download | external_mesa3d-09348c12fceba59c22219fe3272260eb8ea6051e.zip external_mesa3d-09348c12fceba59c22219fe3272260eb8ea6051e.tar.gz external_mesa3d-09348c12fceba59c22219fe3272260eb8ea6051e.tar.bz2 | |
i965: Split batch emission from relocation functions.
So that everything writing to the batch between BEGIN_BATCH() and
ADVANCE_BATCH() goes through OUT_BATCH.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_batchbuffer.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_batchbuffer.h | 34 |
1 files changed, 18 insertions, 16 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h b/src/mesa/drivers/dri/i965/intel_batchbuffer.h index e58eae4..c0456f3 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.h @@ -57,16 +57,16 @@ void intel_batchbuffer_data(struct brw_context *brw, const void *data, GLuint bytes, enum brw_gpu_ring ring); -bool intel_batchbuffer_emit_reloc(struct brw_context *brw, - drm_intel_bo *buffer, - uint32_t read_domains, - uint32_t write_domain, - uint32_t offset); -bool intel_batchbuffer_emit_reloc64(struct brw_context *brw, - drm_intel_bo *buffer, - uint32_t read_domains, - uint32_t write_domain, - uint32_t offset); +uint32_t intel_batchbuffer_reloc(struct brw_context *brw, + drm_intel_bo *buffer, + uint32_t read_domains, + uint32_t write_domain, + uint32_t offset); +uint64_t intel_batchbuffer_reloc64(struct brw_context *brw, + drm_intel_bo *buffer, + uint32_t read_domains, + uint32_t write_domain, + uint32_t offset); static inline uint32_t float_as_int(float f) { union { @@ -164,14 +164,16 @@ intel_batchbuffer_advance(struct brw_context *brw) #define BEGIN_BATCH_BLT(n) intel_batchbuffer_begin(brw, n, BLT_RING) #define OUT_BATCH(d) intel_batchbuffer_emit_dword(brw, d) #define OUT_BATCH_F(f) intel_batchbuffer_emit_float(brw, f) -#define OUT_RELOC(buf, read_domains, write_domain, delta) do { \ - intel_batchbuffer_emit_reloc(brw, buf, \ - read_domains, write_domain, delta); \ -} while (0) +#define OUT_RELOC(buf, read_domains, write_domain, delta) \ + OUT_BATCH(intel_batchbuffer_reloc(brw, buf, read_domains, write_domain, \ + delta)) /* Handle 48-bit address relocations for Gen8+ */ -#define OUT_RELOC64(buf, read_domains, write_domain, delta) do { \ - intel_batchbuffer_emit_reloc64(brw, buf, read_domains, write_domain, delta); \ +#define OUT_RELOC64(buf, read_domains, write_domain, delta) do { \ + uint64_t reloc64 = intel_batchbuffer_reloc64(brw, buf, read_domains, \ + write_domain, delta); \ + OUT_BATCH(reloc64); \ + OUT_BATCH(reloc64 >> 32); \ } while (0) #define ADVANCE_BATCH() intel_batchbuffer_advance(brw); |