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| author | Kenneth Graunke <kenneth@whitecape.org> | 2013-11-25 13:53:33 -0800 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2013-12-09 13:52:18 -0800 |
| commit | 19190c2b8c67baa258cf2865ea95ff5dca300d36 (patch) | |
| tree | d4e0eb369e6bcdd9aad98fb1f7aae03494c145a7 /src/mesa/drivers/dri/i965/intel_batchbuffer.h | |
| parent | 088494aa032bf32db8b67f1fb07e5797603a473d (diff) | |
| download | external_mesa3d-19190c2b8c67baa258cf2865ea95ff5dca300d36.zip external_mesa3d-19190c2b8c67baa258cf2865ea95ff5dca300d36.tar.gz external_mesa3d-19190c2b8c67baa258cf2865ea95ff5dca300d36.tar.bz2 | |
i965: Replace OUT_RELOC_FENCED with OUT_RELOC.
On Gen4+, OUT_RELOC_FENCED is equivalent to OUT_RELOC; libdrm silently
ignores the fenced flag:
/* We never use HW fences for rendering on 965+ */
if (bufmgr_gem->gen >= 4)
need_fence = false;
Thanks to Eric for noticing this.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_batchbuffer.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_batchbuffer.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h b/src/mesa/drivers/dri/i965/intel_batchbuffer.h index 02120bb..80cd571 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.h @@ -173,10 +173,6 @@ void intel_batchbuffer_cached_advance(struct brw_context *brw); intel_batchbuffer_emit_reloc(brw, buf, \ read_domains, write_domain, delta); \ } while (0) -#define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \ - intel_batchbuffer_emit_reloc_fenced(brw, buf, \ - read_domains, write_domain, delta); \ -} while (0) #define ADVANCE_BATCH() intel_batchbuffer_advance(brw); #define CACHED_BATCH() intel_batchbuffer_cached_advance(brw); |