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| author | Paul Berry <stereotype441@gmail.com> | 2013-11-04 20:06:48 -0800 |
|---|---|---|
| committer | Paul Berry <stereotype441@gmail.com> | 2013-11-18 10:09:11 -0800 |
| commit | 7dfb4b2d00ddb8e5ee24d4c58eb9415dc4ccc21c (patch) | |
| tree | 79601460f1cdc347b8c9f9e957f2e56a67da7bf2 /src/mesa/drivers/dri/i965/intel_batchbuffer.h | |
| parent | d22220219347689c51134e4a5650d75143748017 (diff) | |
| download | external_mesa3d-7dfb4b2d00ddb8e5ee24d4c58eb9415dc4ccc21c.zip external_mesa3d-7dfb4b2d00ddb8e5ee24d4c58eb9415dc4ccc21c.tar.gz external_mesa3d-7dfb4b2d00ddb8e5ee24d4c58eb9415dc4ccc21c.tar.bz2 | |
i965/gen7: Emit workaround flush when changing GS enable state.
v2: Don't go to extra work to avoid extraneous flushes. (Previous
experiments in the kernel have suggested that flushing the pipeline
when it is already empty is extremely cheap).
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_batchbuffer.h')
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_batchbuffer.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h b/src/mesa/drivers/dri/i965/intel_batchbuffer.h index d46f48e..cabbb69 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.h @@ -59,6 +59,7 @@ void intel_batchbuffer_emit_mi_flush(struct brw_context *brw); void intel_emit_post_sync_nonzero_flush(struct brw_context *brw); void intel_emit_depth_stall_flushes(struct brw_context *brw); void gen7_emit_vs_workaround_flush(struct brw_context *brw); +void gen7_emit_cs_stall_flush(struct brw_context *brw); static INLINE uint32_t float_as_int(float f) { |