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author | Kenneth Graunke <kenneth@whitecape.org> | 2013-12-11 14:44:45 -0800 |
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committer | Kenneth Graunke <kenneth@whitecape.org> | 2014-01-20 15:38:16 -0800 |
commit | 9420b577ddeefe04c9812e9b62628e2f01be06cf (patch) | |
tree | ef7805885e0b946113d15efd125db086a76a3b95 /src/mesa/drivers/dri/i965/intel_batchbuffer.h | |
parent | ded56746890ea826a32d763b2fe2af9a16755e87 (diff) | |
download | external_mesa3d-9420b577ddeefe04c9812e9b62628e2f01be06cf.zip external_mesa3d-9420b577ddeefe04c9812e9b62628e2f01be06cf.tar.gz external_mesa3d-9420b577ddeefe04c9812e9b62628e2f01be06cf.tar.bz2 |
i965: Create a helper function for emitting PIPE_CONTROL flushes.
These days, we need to emit PIPE_CONTROL flushes all over the place.
Being able to do that via a single function call seems convenient.
Broadwell will also increase the length of these packets by 1; with the
refactoring, we should have to do this in substantially fewer places.
v2: Add back forgotten intel_emit_post_sync_nonzero_flush (caught by
Eric Anholt). Drop unlikely() from BLT_RING check.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_batchbuffer.h')
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_batchbuffer.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h b/src/mesa/drivers/dri/i965/intel_batchbuffer.h index 2b2693f..5ed2089 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.h @@ -64,6 +64,7 @@ bool intel_batchbuffer_emit_reloc64(struct brw_context *brw, uint32_t read_domains, uint32_t write_domain, uint32_t offset); +void brw_emit_pipe_control_flush(struct brw_context *brw, uint32_t flags); void intel_batchbuffer_emit_mi_flush(struct brw_context *brw); void intel_emit_post_sync_nonzero_flush(struct brw_context *brw); void intel_emit_depth_stall_flushes(struct brw_context *brw); |