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author | Chris Wilson <chris@chris-wilson.co.uk> | 2015-06-05 14:45:18 +0100 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2015-06-08 17:56:14 +0100 |
commit | 922c0c9fd526ce19b87bc74a3159dec7705c1de1 (patch) | |
tree | aaefea96467b946d4c15d43e3fad7c2b52533805 /src/mesa/drivers/dri/i965/intel_blit.c | |
parent | c2d0606827412b710dcaed80268fc665de8c9c5d (diff) | |
download | external_mesa3d-922c0c9fd526ce19b87bc74a3159dec7705c1de1.zip external_mesa3d-922c0c9fd526ce19b87bc74a3159dec7705c1de1.tar.gz external_mesa3d-922c0c9fd526ce19b87bc74a3159dec7705c1de1.tar.bz2 |
i965: Export format comparison for blitting between miptrees
Since the introduction of
commit 536003c11e4cb1172c540932ce3cce06f03bf44e
Author: Boyan Ding <boyan.j.ding@gmail.com>
Date: Wed Mar 25 19:36:54 2015 +0800
i965: Add XRGB8888 format to intel_screen_make_configs
winsys buffers no longer have an alpha channel. This causes
_mesa_format_matches_format_and_type() to reject previously working BGRA
uploads from using the BLT fast path. Instead of using the generic
routine for matching formats exactly, export the slightly more relaxed
check from intel_miptree_blit() which importantly allows the blitter
routine to apply a small number of format conversions.
References: https://bugs.freedesktop.org/show_bug.cgi?id=90839
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: Alexander Monakov <amonakov@gmail.com>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_blit.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_blit.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index 059165e..5afc771 100644 --- a/src/mesa/drivers/dri/i965/intel_blit.c +++ b/src/mesa/drivers/dri/i965/intel_blit.c @@ -139,8 +139,8 @@ blt_pitch(struct intel_mipmap_tree *mt) return pitch; } -static bool -blt_compatible_formats(mesa_format src, mesa_format dst) +bool +intel_miptree_blit_compatible_formats(mesa_format src, mesa_format dst) { /* The BLT doesn't handle sRGB conversion */ assert(src == _mesa_get_srgb_format_linear(src)); @@ -206,7 +206,7 @@ intel_miptree_blit(struct brw_context *brw, * the X channel don't matter), and XRGB8888 to ARGB8888 by setting the A * channel to 1.0 at the end. */ - if (!blt_compatible_formats(src_format, dst_format)) { + if (!intel_miptree_blit_compatible_formats(src_format, dst_format)) { perf_debug("%s: Can't use hardware blitter from %s to %s, " "falling back.\n", __func__, _mesa_get_format_name(src_format), |